Quantum Computing Modalities: Superconducting Cat Qubits

(For other quantum computing modalities and architectures, see Taxonomy of Quantum Computing: Modalities & Architectures)

What It Is

A cat qubit stores quantum information in a superconducting microwave resonator as a superposition of two coherent states with opposite phase: |α⟩ and |-α⟩, named after Schrödinger’s famous thought experiment. Where a standard transmon qubit uses the two lowest energy levels of a Josephson junction, a cat qubit uses the multi-photon state of a resonator, engineered so that the system is stable in two widely separated phase-space configurations and unstable everywhere in between.

The consequence is asymmetric noise. A “bit-flip” error (swapping |α⟩ for |-α⟩) requires the system to tunnel through a large energy barrier in phase space, which becomes exponentially unlikely as the cat state grows larger (more photons, larger α). A “phase-flip” error (losing the relative phase between |α⟩ and |-α⟩) remains possible but can be caught by a simple repetition code. The result is a biased-noise qubit: one error type is suppressed by the hardware, the other is handled by minimal error correction.

This bias changes the economics of fault tolerance. Conventional quantum error correction must protect against both bit-flips and phase-flips equally, which is why surface codes on superconducting or trapped-ion qubits need ~1,000 physical qubits per logical qubit. Cat qubits suppress bit-flips at the physics level, so the error correction code only needs to handle phase-flips. A simple repetition code suffices for that. Alice & Bob claims this could reduce the hardware requirements for a useful quantum computer by up to 200× compared to transmon-based surface-code approaches.

From a CRQC perspective, cat qubits are important because they offer a path to fault tolerance with fewer physical qubits. If the 200× reduction holds at scale, the total physical qubit count for breaking RSA-2048 drops from millions (surface code) to tens of thousands. That could accelerate the timeline to a CRQC, or it could make CRQCs more compact and accessible once another modality demonstrates fault tolerance first and cat qubits are adopted for efficiency.

How It Works

The Cat State in Phase Space

A coherent state |α⟩ is the quantum state that most closely resembles a classical oscillation: a wave packet oscillating back and forth in the resonator with a well-defined amplitude and phase. Two coherent states with opposite phase, |α⟩ and |-α⟩, occupy opposite sides of phase space (a mathematical representation where the x-axis is the oscillation amplitude and the y-axis is the momentum).

The coherent states |α⟩ and |-α⟩ form the computational basis. In phase space, they look like two well-separated blobs on opposite sides of the origin. The even and odd cat states, |+⟩ = N(|α⟩ + |-α⟩) and |-⟩ = N(|α⟩ – |-α⟩), are superpositions of these coherent states and exhibit quantum interference fringes at the origin. A bit-flip requires the system to jump from one blob to the other, crossing the origin. As |α| grows (more photons), the blobs move further apart, and the jump probability decreases exponentially. This is the hardware-level bit-flip suppression.

Stabilization: Keeping the Cat Alive

A resonator left alone does not naturally stay in a cat state. Photon loss, thermal fluctuations, and decoherence degrade the superposition. Two approaches engineer stability:

Two-photon dissipation. An engineered coupling to an auxiliary “buffer” mode is designed so that the resonator preferentially loses photons in pairs. Single-photon loss (the dominant noise channel) causes a phase flip, switching the qubit between the two coherent-state computational basis states. This is the error type that the outer repetition code is designed to catch. The two-photon dissipation process continuously restores the system to the cat-state manifold, suppressing bit flips (transitions out of the computational subspace) exponentially. This was the approach pioneered by Mirrahimi et al. (2014) and implemented in AWS‘s Ocelot chip: five cat qubits stabilized by five buffer circuits, with four transmon ancillas for phase-flip detection.

Kerr-cat stabilization. A nonlinear Josephson element provides a Kerr nonlinearity (a photon-number-dependent frequency shift) that, combined with a parametric drive, creates an effective double-well potential in phase space. The system oscillates around one of two stable points, |α⟩ or |-α⟩, without needing engineered dissipation. The Yale group (Grimm et al., 2020) demonstrated this approach, achieving an order-of-magnitude improvement in coherence for the stabilized cat.

Squeezed cats. Alice & Bob introduced a squeezed-state variant (February 2025 preprint) that applies a parametric squeezing drive to narrow the phase-space distribution of the cat states. This achieved a 160× improvement in bit-flip lifetime, reaching 22 seconds. In September 2025, Alice & Bob reported bit-flip stability exceeding one hour on their Galvanic Cat design (the same architecture used in the 12-cat-qubit Helium 2 chip). For reference, typical transmon T₁ times are 50–100 µs.

Gates and Operations

Single-qubit gates on cat qubits are performed by applying drives that rotate the cat state in phase space. The Z gate (phase rotation) is straightforward: a detuning pulse shifts the relative phase between |α⟩ and |-α⟩. The X gate (bit-flip) is harder: it must cross the phase-space barrier that the cat encoding is designed to protect. This is done by temporarily reducing the cat amplitude (shrinking |α| toward zero, where the bit-flip barrier vanishes), applying the rotation, and re-inflating.

Two-qubit entangling gates are the critical challenge. The gate must be “bias-preserving”: it must entangle two cat qubits without converting the suppressed bit-flip errors into unsuppressed phase-flip errors. Several bias-preserving gate designs have been proposed and are under development. Alice & Bob and AWS are both working on bias-preserving CNOT gates that maintain the exponential bit-flip suppression during the two-qubit interaction.

The Repetition Code Architecture

The full error-correction scheme is a concatenation: cat qubits suppress bit-flips at the physical level, and a simple repetition code corrects phase-flips at the logical level. In a distance-d repetition code, d cat qubits encode one logical qubit, with d-1 ancilla transmons measuring phase-flip syndromes between adjacent cat qubits. The total qubit count per logical qubit is 2d – 1 (cat qubits plus ancillas).

AWS Ocelot demonstrated this: 5 cat qubits + 4 transmon ancillas = 9 physical qubits encoding one logical qubit at distance 5. The logical error rate per cycle was ~1.65% at distance 5, down from ~1.72% at distance 3, confirming below-threshold scaling (error rate decreasing with code distance).

Compare this to a surface code on transmons: a distance-5 surface code requires 49 physical qubits for one logical qubit. The cat-qubit repetition code achieves comparable error protection with 9 qubits. That is the 5× efficiency gain at small scale that Alice & Bob projects extends to 200× at the scale needed for useful computation.

Key Academic Papers

Cochrane, Milburn & Munro (1999). First theoretical proposal for using cat states in a harmonic oscillator as a bosonic code that survives amplitude-damping errors. Published in Physical Review A.

Mirrahimi et al. (2014). Comprehensive framework for dynamically stabilized cat qubits in superconducting circuits. Introduced the two-photon dissipation stabilization concept. Published in New Journal of Physics.

Ofek et al. / Yale (2016). First quantum error correction reaching break-even: a cat-coded logical qubit in a 3D superconducting cavity with corrected lifetime of 320 µs, exceeding the uncorrected physical qubit. Published in Nature.

Guillaud & Mirrahimi (2019). Proposed the repetition-code architecture for cat qubits, showing that concatenating biased-noise qubits with a simple repetition code can achieve fault tolerance with far fewer physical qubits than surface codes. The architectural blueprint for both AWS and Alice & Bob.

Grimm et al. / Yale (2020). Demonstrated Kerr-cat stabilization with >10× coherence improvement and all single-qubit gates 60× faster than the coherence time. Published in Nature.

Putterman et al. / AWS + Caltech (February 2025, Nature). The Ocelot chip: 5 cat qubits + 4 transmon ancillas, distance-5 repetition code, ~1.65% logical error rate per cycle, bit-flip times approaching 1 second. First scalable multi-cat-qubit chip. My analysis.

Alice & Bob squeezed cat (February 2025). 160× improvement in bit-flip lifetime to 22 seconds via squeezed cat states, without hardware changes to the circuit.

Alice & Bob hour-long bit-flip stability (September 2025). Bit-flip lifetime exceeding one hour on the Galvanic Cat design (Helium 2 chip). Four times longer than the 13-minute target for Alice & Bob’s 2030 fault-tolerant roadmap.

The Vendor Landscape (May 2026)

Cat qubits are pursued by two major organizations, taking different architectural approaches to the same core physics.

Alice & Bob (Paris and Boston). The cat-qubit-native startup, founded by Théau Peronnin and Raphaël Lescanne, who developed the technology at ENS Paris. Alice & Bob has raised over €130 million (€100M Series B, recently expanded with investment from NVIDIA NVentures, announced May 2026). Over 150 employees. Advised by Nobel Prize-winning researchers.

Alice & Bob’s experimental trajectory in 2024-2026 is the fastest-moving development program in cat qubits:

• 160× bit-flip improvement via squeezed cats (February 2025)
• Bit-flip stability exceeding one hour on Galvanic Cat / Helium 2 chip (September 2025)
• NVQLink collaboration announced (October 2025)
• “Elevator Codes” QEC architecture with 9.25× GPU-accelerated decoding via CUDA-Q (March 2026)
• Magic state preparation results for non-Clifford gates (2025)
• 12+ research talks at APS Global Physics Summit 2026
• NVentures investment expanding Series B (May 2026)

The Helium 2 chip contains 12 cat qubits using the Galvanic Cat design. Alice & Bob’s 2030 roadmap targets an early fault-tolerant quantum computer (eFTQC) with 100 logical qubits for materials science applications. The company claims its cat-qubit architecture could reduce the hardware requirements by up to 200× compared to transmon surface-code approaches.

AWS (USA, in collaboration with Caltech). AWS’s quantum hardware program, led by Oskar Painter (Caltech), chose cat qubits as its physical qubit architecture. The Ocelot chip (Nature, February 2025) is the first multi-cat-qubit integrated chip, demonstrating that cat-qubit stabilization and repetition-code error correction can be combined on a scalable superconducting platform. AWS reports bit-flip times approaching 1 second (vs. 50-100 µs for transmon T₁) and a logical error rate of ~1.65% at distance 5. AWS projects that cat-qubit architectures could reduce error-correction overhead by up to 90% compared to standard approaches.

Nord Quantique (Sherbrooke, Canada). Uses bosonic codes (including cat codes and binomial codes) in superconducting 3D cavities. Demonstrated error correction extending a bosonic qubit’s lifetime beyond break-even. Nord Quantique focuses on the bosonic-code approach to QEC without the specific two-photon-dissipation stabilization that Alice & Bob and AWS use.

Quantum Circuits Inc. (QCI) (USA). Dual-rail bosonic qubits; NVQLink partner. Related but distinct from cat qubits: QCI uses a different bosonic encoding (dual-rail, where the qubit is the presence of a photon in one of two resonators) rather than the coherent-state encoding of cat qubits.

Comparison to Other Modalities

Cat Qubits vs. Standard Transmon Superconducting

Cat qubits and transmons are both superconducting circuits operating at millikelvin temperatures in dilution refrigerators. They share the same cryogenic infrastructure, similar fabrication processes (Josephson junctions, aluminum on silicon or sapphire), and can even coexist on the same chip (Ocelot uses transmon ancillas alongside cat qubits).

The difference is in error structure. Transmon errors are symmetric: bit-flips and phase-flips occur at comparable rates, requiring 2D surface codes that protect against both. Cat qubit errors are asymmetric: bit-flips are exponentially suppressed, so a 1D repetition code (handling phase-flips only) suffices. This gives cat qubits a ~5× qubit-count advantage at small code distances, projected to 200× at useful scale.

The tradeoff: cat qubit two-qubit gates must be bias-preserving (maintaining the bit-flip suppression), which imposes design constraints that do not exist for transmons. Bias-preserving CNOT gates are under development but not yet demonstrated at the fidelities needed for fault tolerance. Transmon two-qubit gates are more mature (99.67% on Google Willow, 99.5% on Rigetti Ankaa-3, 99.7% on QuantWare Gen-D).

Cat Qubits vs. Trapped Ion

Trapped ions achieve the highest gate fidelities (99.921% on Quantinuum Helios) and already run qLDPC codes at 2:1 efficiency. Cat qubits have worse raw gate fidelity but could achieve comparable or better logical error rates because the bias-preserving architecture only needs to correct one error type. The question is whether cat qubits can close the raw fidelity gap enough for the repetition code to outperform trapped-ion qLDPC codes in total resource cost.

Cat Qubits vs. Neutral Atom

Neutral atoms have demonstrated 96 logical qubits on 448 physical qubits and operate at room temperature. Cat qubits require dilution refrigerators but could achieve comparable or better encoding efficiency if the 200× overhead reduction materializes. The modalities are not direct competitors today: neutral atoms are years ahead in logical qubit demonstrations, while cat qubits are still proving their bias-preserving gate architecture.

Cat Qubits vs. Topological

Both modalities promise hardware-level error suppression, but through completely different physics. Topological qubits (Majorana) would suppress all error types via non-local encoding. Cat qubits suppress one error type (bit-flips) via the cat-state energy barrier. Cat qubits have working hardware (Ocelot, Helium 2). Topological qubits have no demonstrated qubit.

Advantages

Exponential bit-flip suppression. The defining feature. Bit-flip lifetime exceeds one hour on Alice & Bob’s Galvanic Cat, compared to ~100 µs for transmon T₁. This suppression grows exponentially with the cat amplitude |α|, providing a hardware-level error reduction that no amount of software error correction can replicate.

Reduced QEC overhead. By eliminating the need to correct bit-flips, cat qubits convert the 2D surface code into a 1D repetition code. AWS Ocelot encodes a distance-5 logical qubit in 9 physical qubits vs. 49 for a transmon surface code. At scale, Alice & Bob projects up to 200× reduction in physical qubit count.

Superconducting ecosystem compatibility. Cat qubits use the same fabrication processes, cryogenics, and control infrastructure as transmon qubits. They can integrate transmon ancillas on the same chip (as Ocelot demonstrates). This means the entire superconducting QOA supply chain (Bluefors cryostats, Qblox/QM/Zurich control electronics, Delft Circuits wiring) is directly applicable.

Working hardware. Both AWS (Ocelot, 5 cat qubits) and Alice & Bob (Helium 2, 12 cat qubits) have operational multi-qubit chips. This is not a theoretical concept awaiting experimental validation, unlike topological qubits.

Disadvantages

Bias-preserving two-qubit gates unproven at scale. The entire fault-tolerance scheme depends on two-qubit gates that maintain bit-flip suppression during the entangling operation. If the gate temporarily lifts the bit-flip barrier, the bias advantage is lost. Bias-preserving CNOT gates are under active development but not yet demonstrated at the >99.5% fidelities that surface-code transmon gates have achieved.

Gate complexity. Single-qubit X gates require temporarily deflating the cat state (reducing |α| toward zero), which briefly exposes the qubit to unsuppressed noise. This adds operational complexity compared to a transmon, where all Clifford gates are straightforward microwave pulses.

Phase-flip rates still limit performance. While bit-flips are suppressed, phase-flip rates in cat qubits (determined by photon loss and dephasing) are comparable to or worse than transmon error rates. The repetition code must handle these phase-flips, and the code distance required depends on how low the phase-flip rate can be pushed. Ocelot’s ~1.65% logical error rate per cycle at distance 5 is below threshold but still far from the ~10⁻⁶ logical error rates needed for useful computation.

Requires ancilla transmons. The repetition code uses standard transmon qubits as syndrome-measurement ancillas. These transmons have conventional (symmetric) error rates, so they can inject non-bias-preserving errors into the code. Managing this hybrid cat+transmon error model adds complexity to the decoder design.

Still requires cryogenics. Cat qubits operate at 10-20 mK in dilution refrigerators, with all the associated helium-3 supply chain and facility requirements. No advantage over transmons here; a disadvantage vs. room-temperature neutral atoms.

Impact on Cybersecurity

Cat qubits affect the CRQC timeline through the error-correction efficiency channel. If the 200× overhead reduction holds at the scale needed for cryptanalysis, the total physical qubit count for breaking RSA-2048 drops from ~1.4 million (surface code on transmons, using the Gidney 2025 estimate of ~1,400 logical qubits at ~1,000:1 ratio) to ~7,000 (at ~5:1 ratio). Seven thousand superconducting cat qubits on a single chip is not imminent, but it is a much more accessible engineering target than 1.4 million transmons.

The timeline implication: if cat qubits demonstrate fault-tolerant operation and bias-preserving gates at >99.5% fidelity in the next 2-3 years, the CRQC could arrive sooner than surface-code-only projections suggest. Alice & Bob’s 2030 eFTQC roadmap (100 logical qubits) is not itself a CRQC, but it would demonstrate the architecture at a scale where extrapolation to cryptanalytic capability becomes concrete.

The response for practitioners: PQC migration is driven by regulatory and client deadlines, not by predictions about which modality will arrive first. Cat qubits add another credible path to fault tolerance, which strengthens the overall case for acting now.

Future Outlook

2026. Alice & Bob scales the Helium 2 chip and demonstrates bias-preserving two-qubit gates at scale. AWS iterates on Ocelot toward higher code distances and lower logical error rates. The central question: can bias-preserving CNOT gates achieve >99.5% fidelity? If yes, the cat-qubit path to fault tolerance becomes the most qubit-efficient among all superconducting approaches.

2027-2028. Alice & Bob targets multi-logical-qubit demonstrations and early eFTQC. AWS integrates next-generation cat-qubit hardware into its Braket quantum computing service. Elevator Codes (Alice & Bob’s concatenation scheme for biased noise) are tested at scale with GPU-accelerated decoding on NVQLink. If the 200× overhead reduction survives contact with real hardware, cat qubits reshape the competitive calculus among superconducting approaches.

2030. Alice & Bob’s eFTQC roadmap targets 100 logical qubits for materials science applications. Whether this arrives on schedule depends on solving the bias-preserving gate problem, achieving sufficient phase-flip suppression for the repetition code to produce low logical error rates, and manufacturing chips with enough cat qubits and ancillas to encode the target number of logical qubits.

Cat qubits are not a separate modality in the way that trapped ions or neutral atoms are. They are an engineering strategy within the superconducting ecosystem that trades a harder gate-design problem (bias-preserving operations) for a much easier error-correction problem (1D repetition code instead of 2D surface code). Whether that trade pays off is the question that the next three years will answer. The bit-flip suppression results are convincing. The two-qubit gate results are not yet in.