Quantum Computing Companies

Alice & Bob

(This profile is one entry in my 2025 series on quantum hardware roadmaps and CRQC risk. For the cross‑vendor overview, filters, and links to all companies, see Quantum Hardware Companies and Roadmaps Comparison 2025.)

Updated October 2026 with Alice & Bob’s 2025–2026 hardware results, funding, government programs and published Shor’s-algorithm estimates. This update also corrects errors in the earlier version, and the earlier extrapolation of about a million cat qubits for Shor’s algorithm is replaced with the company’s own published estimates.

The Company and Its Cat-Qubit Strategy

Alice & Bob is a Paris- and Boston-based company building a fault-tolerant quantum computer from superconducting cat qubits, qubits stored in microwave resonators and designed so that one of the two basic types of quantum error almost never occurs. Théau Peronnin (CEO) and Raphaël Lescanne (CTO) founded the company in 2020, the year Lescanne, Peronnin and their co-authors published a Nature Physics experiment in which bit-flip errors in such a qubit fell exponentially as its two states were pushed further apart. In October 2026 Alice & Bob reported more than 250 employees and €180 million raised.

Alice & Bob is betting on a cheaper form of error correction. Transmons, the superconducting qubits used by IBM and Google, suffer bit flips and phase flips at comparable rates, and the surface code that corrects both needs a two-dimensional patch of physical qubits for every logical qubit. A cat qubit suppresses bit flips in the hardware itself, so Alice & Bob only has to correct phase flips, with a much smaller code. Peronnin summed up the claim when the company closed its Series B in January 2025: “where conventional approaches would require millions of qubits, we would need only thousands.”

Six years in, Alice & Bob has reported the longest bit-flip times I have seen for a superconducting qubit, about 44 minutes on a single cat qubit in preliminary results from September 2025. In June 2026 it launched its first complete system, the Helium Quantum System. Its next roadmap milestone, a logical qubit operating below the error-correction threshold, is still open: in October 2026 the company reported that its first repetition-code runs in France’s PROQCIMA program were “not yet below threshold.” My bottom line for October 2026 is that Alice & Bob has shown the bit-flip protection its design depends on, but not yet a logical qubit that improves as the code grows. Its published Shor’s-algorithm estimates also assume a noise ratio several hundred times better than the best value it has reported.

  • Founded: 2020 in Paris; Boston office since 2023
  • Founders: Théau Peronnin (CEO) and Raphaël Lescanne (CTO)
  • Qubit type: dissipative superconducting cat qubits, stabilized by engineered two-photon loss
  • Funding: €27 million Series A (2022), €100 million Series B (2025), NVentures extension (2026); €180 million in total, according to the company
  • People: 251 employees in April 2026, 79 of them with PhDs
  • Hardware: Helium Quantum System (June 2026); the largest chip with reported error-correction results has 12 cat qubits
  • Roadmap target: Graphene, 100 logical qubits on 2,000 cat qubits, in 2030
  • Government programs: France’s PROQCIMA (since 2024); Stage A of DARPA’s Quantum Benchmarking Initiative (2025)

Milestones & Roadmap

Alice & Bob published its five-phase hardware roadmap in December 2024, alongside a white paper on cat qubits. Each milestone has its own chip series, and the company gave years for only two of them: it marked the Boson milestone complete in 2024 and committed to launching Graphene in 2030. Below are the roadmap’s figures and the status of each milestone in October 2026.

MilestoneChip seriesCat qubitsLogical qubitsTarget logical error rateStatus, October 2026
1. Master the cat qubitBoson1n/an/aComplete: Boson 4 reached a bit-flip time above seven minutes (2024)
2. Build a logical qubit below thresholdHelium12–18110−2Distance-3 repetition code run; not yet below threshold
3. First fault-tolerant gate between logical qubitsLithium48410−3Next chip; no date given
4. Universal gate set with magic statesBeryllium250510−4No date given
5. Useful quantum computingGraphene2,00010010−6Target 2030
Source: Alice & Bob roadmap, December 2024. Status from company announcements through 20 October 2026.

Boson: The Single Cat Qubit

The Boson series ended with Boson 4, a one-qubit chip that Alice & Bob opened to outside researchers through Google Cloud Marketplace in May 2024. Boson 4 reached a bit-flip time above seven minutes, then a record for any superconducting qubit. According to the roadmap document, Alice & Bob also ran a two-qubit CNOT gate between cat qubits on a transitional Hydrogen chip in March 2024.

Helium: The First Logical Qubit

With Helium, Alice & Bob moves from single qubits to error correction. It taped out Helium 1, a 16-qubit processor, in December 2023 and later built Helium 2, a 12-cat-qubit chip based on the company’s Galvanic Cat design. In June 2026 it launched the Helium Quantum System, its first complete on-premise machine, with control electronics, the company’s Felis software framework, a monitoring console called Starboard and Slurm integration for supercomputing centers. Alice & Bob says the system is designed to encode its first logical qubit in as few as 18 cat qubits and draws about 40 kW. The company has invited research partners to run experiments on it.

Alice & Bob reported its first error-correction results on 20 October 2026, from Phase 1 of PROQCIMA, the French defense program to build universal quantum computers. In its release, the company described three demonstrators, two built on 6-qubit chips and one on a 12-qubit chip. On them the team ran noise-biased CNOT gates between cat qubits, a measure-and-reset cycle for the auxiliary qubits, several cycles of a distance-3 repetition code on three data qubits, and a first non-Clifford gate on a cat qubit (the gate type that error correction makes hardest to protect). The logical error rate was “not yet below threshold.” Alice & Bob’s engineers built a digital twin of the processor from the measured data, and their simulations put more uniform coherence across the chip first among the improvements needed. The release gave no fidelities, error rates or cycle counts.

A code runs below threshold when each increase in code distance cuts the logical error rate. Google showed this for a distance-7 surface code on its Willow processor in December 2024, and AWS showed it for a cat-qubit repetition code at distance 5 on its Ocelot chip in February 2025. Alice & Bob has not yet reported it on its own hardware. Until it does, the Helium milestone stays open, and the company has about four years to complete Helium, Lithium and Beryllium before the 2030 Graphene date.

Alice & Bob has revised public timing before. When the company raised its Series A in March 2022, TechCrunch reported that the money would fund chips, computers and a service business for a 2023 launch. The first chip outsiders could use, the single-qubit Boson 4, arrived in May 2024.

Lithium, Beryllium and Graphene

Lithium is the multi-logical-qubit stage: 48 cat qubits, four logical qubits and the first error-corrected gate between two logical qubits, on a 0.8 µs cycle. Alice & Bob built the Helium system to accept the next chip, which it describes as having multiple logical qubits. With Beryllium, the company plans to add the non-Clifford gates that make the gate set universal, using magic states (special resource states consumed to run those gates) prepared on the chip, with 250 cat qubits for five logical qubits. Graphene is the 2030 machine: 100 logical qubits on 2,000 cat qubits, a 10−6 logical error rate and a 1 µs cycle, aimed at early industrial use cases in supercomputing centers. Beyond Graphene, Alice & Bob promises only “more logical qubits, lower error rates, and faster speeds.”

Alice & Bob has published three different sets of numbers for a 100-logical-qubit machine. A January 2024 announcement said 100 logical qubits at a 10−8 error rate could need as few as 1,500 cat qubits. The LDPC-cat paper behind that announcement, which pairs cat qubits with classical low-density parity-check (LDPC) codes, puts a memory block for 100 logical qubits at 758 cat qubits, before the extra qubits needed to run gates. The December 2024 roadmap uses 2,000 cat qubits at 10−6. I treat the roadmap figures as the company’s commitment and the other two as design studies.

Focus on Fault Tolerance

How Alice & Bob’s Cat Qubits Suppress Bit Flips

A cat qubit stores 0 and 1 as two coherent states of a microwave resonator, written |α⟩ and |−α⟩: the same oscillating field with opposite phases. Alice & Bob keeps the resonator in that pair of states by removing photons two at a time, through a nonlinear Josephson coupler and a second, deliberately lossy “buffer” resonator. Physicists write the rate of this two-photon loss as κ2. A flip from |α⟩ to |−α⟩ would require the field to pass through intermediate states that the two-photon loss keeps pulling back toward the nearest of the two, and the bit-flip rate falls exponentially as the mean number of photons in the resonator grows.

The cost is in phase flips. Single photons still leak out of the resonator at a rate κ1 per photon, and each lost photon flips the phase of the superposition, so the phase-flip rate grows roughly in proportion to the photon number. Doubling the photon number roughly squares the bit-flip protection and doubles the phase-flip rate. The smaller the ratio κ1/κ2, the more bit-flip protection Alice & Bob gets at a given phase-flip rate, and it is the first number I look for in any of the company’s results.

These are dissipative cat qubits, the type demonstrated in the 2020 Nature Physics paper. Kerr-cat qubits, demonstrated at Yale in 2020, stabilize the same pair of states with a Kerr nonlinearity and a squeezing drive instead of engineered loss.

Bit-Flip Results Since 2023

Alice & Bob’s main bit-flip results since 2023 are:

  • 2023 preprint, Nature 2024: Réglade et al. reported bit-flip times above 10 seconds and phase-flip times above 490 ns, four orders of magnitude beyond earlier cat qubits.
  • 2023 preprint, Physical Review X 2024: Marquet et al. reached bit-flip times up to 0.3 seconds with an “autoparametric” circuit that produces the two-photon loss without a microwave pump.
  • May 2024: Boson 4 reached a bit-flip time above seven minutes.
  • February 2025 preprint: squeezed cat qubits, a variant that pushes the two states further apart for the same photon number, reached 22 seconds at only 4.1 photons, a 160-fold improvement over a standard cat, with little effect on the phase-flip rate.
  • September 2025, preliminary: a single-qubit chip with the Galvanic Cat design reached a bit-flip time of about 44 minutes (95% confidence interval 33–60 minutes) at 11 photons, with a 420 ns phase-flip time and an extrapolated Z-gate fidelity of 94.2% in 26.5 ns.

All five are single-qubit results, measured while the qubit idles or runs single-qubit gates. Alice & Bob’s own target for Graphene is a 13-minute bit-flip time maintained during two-qubit gates as well, and none of these experiments tests that condition. The September 2025 figure is also preliminary: the company presented it as early results on new techniques, in a blog post with no paper so far.

Readers who divide the 61 hours of that measurement by its 41 bit flips get one flip every 89 minutes, not 44. The two numbers agree if the bit-flip time is read as the decay time of the qubit’s state, which for random switching between two states is half the average interval between switches. I covered the result when it was announced, in Alice & Bob’s one-hour cat qubit.

Phase-Flip Correction With Repetition, LDPC-Cat and Elevator Codes

With bit flips suppressed in hardware, Alice & Bob can correct the remaining phase flips with a one-dimensional repetition code: a chain of cat qubits whose neighbors are compared by parity checks, as Jérémie Guillaud and Mazyar Mirrahimi laid out in Physical Review X in 2019. The checks need CNOT gates that preserve the noise bias, so that a check never converts a phase flip into a bit flip. A repetition code of distance d uses about 2d cat qubits including the check qubits; a surface code of the same distance, correcting both error types, uses about 2d2.

Alice & Bob’s theorists have since gone past the simple chain. In LDPC-cat codes (Nature Communications, 2025), Diego Ruiz, Jérémie Guillaud, Anthony Leverrier, Mazyar Mirrahimi and Christophe Vuillot replace the chain with a classical low-density parity-check code laid out on a 2D grid with local checks. Their headline design stores 100 logical qubits in 758 cat qubits at a logical error rate of 10−8 per qubit per cycle, assuming κ1/κ2 = 10−4. In Elevator codes (preprint, January 2026), Peter Shanahan and Diego Ruiz add an outer bit-flip code on top of the repetition codes, with one logical ancilla moving along them, so the bit-flip protection no longer has to come from photon number alone. Alice & Bob says its simulations show a 10,000-fold lower logical error rate for about three times as many qubits.

Non-Clifford gates are the costly part of any fault-tolerant machine. In unfolded distillation (npj Quantum Information, 2026), Ruiz, Guillaud, Vuillot and Mirrahimi prepare a magic state with a 3×10−7 error rate using 53 qubits and 5.5 rounds of error correction, provided the noise bias is very large. They report more than ten times less circuit volume than magic-state cultivation, the low-cost method Google researchers proposed in 2024 for qubits without a noise bias. All three results are theory and simulation; none has yet been tested on Alice & Bob’s hardware.

Decoders, Control and Calibration

Correcting phase flips in real time also needs a classical decoder that keeps up with the hardware. Alice & Bob signed with Riverlane in May 2024 to integrate Riverlane’s Deltaflow error-correction stack and decoder, and it has worked with NVIDIA since 2024. In October 2026 it decoded LDPC-cat codes on NVIDIA GPUs connected to a Quantum Machines OPX1000 controller through NVIDIA’s NVQLink. The test used synthetic syndrome data and did not run in real time; Alice & Bob named real-time speed as the next step.

Alice & Bob’s MnR software, which supervised the PROQCIMA demonstrators around the clock, tracks more than 50 indicators per qubit and flags drift. The company says finding and correcting drift could previously cost up to a day of machine time. In work announced in September 2026, researchers at ENS de Lyon and Alice & Bob produced the two-photon loss with a DC voltage of about a microvolt across a Josephson junction, in place of the usual microwave pump. The two-photon exchange rate reached 3 MHz. Alice & Bob expects voltage lines to be more compact and to put less heat into the refrigerator than microwave lines; if the approach works at scale, it would simplify the wiring of a large machine.

CRQC Implications

Alice & Bob’s Published Shor Estimates

Alice & Bob’s researchers have published full resource estimates for Shor’s algorithm on the company’s own architecture. A machine able to run them would be a cryptographically relevant quantum computer (CRQC). In Physical Review Letters in 2023, Élie Gouzien, Diego Ruiz, François-Marie Le Régent, Jérémie Guillaud and Nicolas Sangouard estimated that a repetition-cat machine could compute a 256-bit elliptic-curve discrete logarithm in 9 hours with 126,133 cat qubits. They assumed κ1/κ2 = 10−5, about 19 photons per cat and a 500 ns error-correction cycle.

For RSA-2048, the same repetition-cat architecture needed 349,133 cat qubits and about four days, the baseline figures given in the LDPC-cat paper. Switching the memory to LDPC-cat codes brought the count down to 95,941 cat qubits, with a longer run of about seven days and a slower 900 ns cycle, under the same κ1/κ2 = 10−5 assumption. Alice & Bob’s January 2024 announcement called the result 200 times fewer qubits than competing approaches, measured against the roughly 20 million qubits of earlier surface-code estimates such as Gidney and Ekerå’s 2019 paper.

How the Estimates Compare in 2026

Craig Gidney cut his own 20 million figure by more than twentyfold in May 2025. His new estimate factors RSA-2048 in under a week with fewer than a million noisy qubits, assuming 0.1% gate errors, a 1 µs cycle and nearest-neighbor connectivity; I walked through how in my analysis of the Gidney estimate. Iceberg Quantum’s Pinnacle architecture claimed fewer than 100,000 superconducting qubits for RSA-2048 in February 2026, using qLDPC codes that need long-range connections. Against these 2025–2026 estimates, Alice & Bob’s 95,941 cat qubits is about a tenth of Gidney’s count and level with Pinnacle’s, rather than a 200-fold improvement.

Counting cat qubits against transmons also favors the cat side. Each Alice & Bob cat qubit is a storage resonator plus a buffer resonator, a nonlinear coupler and the lines that drive them, so one cat qubit is more hardware than one transmon in a surface-code count. The estimates also assume different hardware: cats at κ1/κ2 = 10−5, transmons at a 10−3 gate error. A fair comparison would run both architectures under matched assumptions about noise, cycle time and wiring, and I have not seen one published.

The Hardware Gap Behind the Estimates

Every Shor estimate above assumes κ2/κ1 = 100,000. The best ratios Alice & Bob has published are about 150, for the autoparametric cat of Marquet et al., and at most 80, for the 10-second cat of Réglade et al., according to a summary on the company’s blog. In the same summary, Alice & Bob’s scientists give “a few hundreds” as the usual estimate for a repetition code to work below threshold, and say that reaching 100,000 would take improvements of one to two orders of magnitude in both κ1 and κ2. Newer chips may do better; Alice & Bob has not published the ratio for its Galvanic Cat or Helium 2 designs.

In qubit count the distance is nearly four orders of magnitude: about 96,000 cat qubits in the LDPC-cat RSA-2048 design, 2,000 in Graphene and 12 on the largest chip with reported error-correction results.

Graphene and the CRQC Timeline

Graphene’s 100 logical qubits are roughly a tenth of what Shor’s algorithm needs. Google Quantum AI’s March 2026 estimate for 256-bit elliptic curves, among the leanest published, uses fewer than 1,200 logical qubits. A machine at the scale of Alice & Bob’s RSA-2048 design, about 48 times Graphene’s 2,000 cat qubits, does not appear on any roadmap Alice & Bob has published.

France’s defense ministry has set a larger goal. When it launched PROQCIMA in March 2024, the ministry targeted two prototype universal quantum computers with 128 logical qubits each by 2032, followed by industrial products at 2,048 logical qubits. Alice & Bob’s October 2026 release describes the target as two prototypes of 1,000 logical qubits each, ready for industrialization by 2032. A 1,000-logical-qubit machine in 2032 would be close to the logical-qubit counts of the leanest published Shor circuits. That is a program target; Alice & Bob’s demonstrated error correction so far is a distance-3 code on three data qubits.

Peronnin has given his own date. He told Fortune in November 2025 that quantum computers should be able to break Bitcoin’s cryptography “a few years after 2030,” and that Bitcoin should move to quantum-resistant cryptography by about 2030.

I count Alice & Bob’s architecture among the credible routes to a CRQC in the 2030s, provided its noise ratio improves by two to three orders of magnitude. A CISO should still not plan migration around any vendor’s date: regulators, insurers and clients have already set the deadlines that drive budgets.

Modality & Strengths/Trade-offs

Alice & Bob works in the bosonic branch of superconducting quantum computing. Instead of transmons, it encodes each qubit in a resonator mode, the cat qubits described above, and its architecture papers use cat qubits for both data and syndrome measurement. The closest comparison is AWS. Its Ocelot chip ran a repetition code over five cat qubits at distance 5 below threshold, but measured the error syndromes with four transmons. In Alice & Bob’s design the cat-to-cat CNOT has to be good enough for syndrome measurement; in AWS’s design the cat-to-transmon gate does.

Strengths

Fewer qubits per logical qubit. With bit flips suppressed exponentially, Alice & Bob can protect a logical qubit with a one-dimensional repetition code or a locally connected LDPC code instead of a two-dimensional surface code. Peronnin told Fortune in November 2025 that a logical qubit takes about 1,000 physical qubits with mainstream approaches today, and that Alice & Bob expects to need as few as 20 within about five years. That is a company projection, and it matches the roadmap’s Graphene figures: 2,000 cat qubits for 100 logical qubits is 20 per logical qubit.

Long bit-flip times. In preliminary results, a single cat qubit has already passed Alice & Bob’s 13-minute Graphene target for bit flips, at least while idle. Phase flips are now the main engineering problem.

Standard superconducting technology. Cat qubits use the same fabrication, cryogenics and microwave control as transmon machines, and Alice & Bob is building its own nanofabrication cleanroom in a new Paris lab.

Superconducting speed. The roadmap’s cycle times of 0.8–1.5 µs are in the range of other superconducting designs. At those speeds, the published Shor estimates run in hours to days.

Trade-offs

Phase flips rise with photon number. Each photon added for bit-flip protection raises the phase-flip rate, so the useful operating point depends on κ1/κ2. Squeezed cats, demonstrated in 2025, get more bit-flip protection per photon, but the ratio still has to improve by orders of magnitude for the published Shor estimates.

Gates must keep the bias. A CNOT between cat qubits must not turn phase flips into bit flips, and non-Clifford gates need magic states. Alice & Bob ran noise-biased CNOTs and its first non-Clifford gate on a cat qubit in the PROQCIMA demonstrators, but it has not published gate error rates for its current chips.

More hardware per qubit. Each cat qubit needs a storage resonator, a buffer resonator, a coupler and pump or bias lines, and high-quality resonators take up chip area. Alice & Bob, ENS de Lyon and Mines Paris – PSL won €16.5 million from France 2030 in March 2024 for a project called Cat Factory. Their goals for 2027 are fewer control and readout lines per cat qubit, a control-electronics footprint three times smaller, 100 logical qubits in one large cryostat and machines 10 times cheaper to build.

Track Record

Research Output

Alice & Bob’s main scientific results appear in peer-reviewed journals: Nature (2024), Physical Review X (2024), Physical Review Letters (2023), Quantum (2023), Nature Communications (2025) and npj Quantum Information (2026). Its preprints cover squeezed cats, Elevator codes and DC-biased two-photon loss. Its two headline hardware claims of 2025–2026, the 44-minute bit-flip time and the PROQCIMA error-correction results, have so far appeared only in a blog post and a press release.

In June 2026 the company published five criteria for judging logical-qubit claims: the logical qubit must outlive its physical qubits; the code needs a parameter that lowers the logical error rate as it grows; the experiment must run more correction cycles than the code distance; the results must be reproducible across all runs without heavy post-selection; and correction must last as long as the intended computation. Alice & Bob’s own October 2026 distance-3 result does not yet meet the second criterion, as the company acknowledged when it reported a logical error rate not yet below threshold.

Alice & Bob’s Consultative Board met in Paris in October 2026. Its members are John Martinis, who shared the 2025 Nobel Prize in Physics; Daniel Gottesman, who created the stabilizer formalism; David DiVincenzo, author of the DiVincenzo criteria; and Yasunobu Nakamura, who first showed coherent control of a superconducting qubit, at NEC in 1999.

Funding, Team and Facilities

Alice & Bob raised a €27 million Series A in March 2022 and a €100 million Series B in January 2025. Future French Champions (a partnership of Bpifrance and the Qatar Investment Authority), AVP and Bpifrance led the Series B, and Elaia, Breega, Supernova Invest and the European Innovation Council also invested. NVIDIA’s venture arm, NVentures, extended the round in May 2026 for an undisclosed sum. The Series A and Series B add up to €127 million; the company’s October 2026 boilerplate puts the total raised at €180 million, without a breakdown.

In September 2025 Alice & Bob announced a plan to hire 100 people by mid-2026, on top of a workforce of about 150. It finished early and reported 251 employees in April 2026, 79 of them with PhDs, from 31 nationalities. Its US business has been based in Boston since 2023, with Juliette Peyronnet as US general manager.

Alice & Bob said in January 2025 that nearly half of the Series B would go to a lab and production facility. In May 2025 it announced a $50 million, 4,000 m² lab in Paris, with a nanofabrication cleanroom for prototype processors, a cryostat farm of 20 Bluefors dilution refrigerators with Quantum Machines control systems, and an area reserved for Graphene.

Partnerships and Government Programs

  • Riverlane (May 2024): integration of Riverlane’s Deltaflow error-correction stack and decoder.
  • Google Cloud (May 2024): Boson 4 offered to researchers through Google Cloud Marketplace.
  • Cat Factory (March 2024): the €16.5 million France 2030 architecture project with ENS de Lyon and Mines Paris.
  • OECQ (July 2024): an energy-efficiency project with EDF, Quandela and CNRS to measure and then reduce the energy use of a full quantum computer stack, with a €6.1 million budget and up to €4.5 million from France 2030.
  • NVIDIA (since 2024): CUDA-Q integration in Alice & Bob’s Dynamiqs simulation library (June 2025), GPU decoding over NVQLink (October 2026) and the NVentures investment (May 2026).
  • Bull (June 2026) and CEA (September 2026): a memorandum with Bull on bringing cat-qubit machines into supercomputing centers through Bull’s Qaptiva platform, and a joint program with CEA on many-body algorithms for early fault-tolerant machines around 2030.

France’s Ministry of the Armed Forces selected Alice & Bob for PROQCIMA in March 2024, one of five companies alongside Pasqal, Quandela, Quobly and C12, in a competition worth up to €500 million over at least ten years. The ministry will keep three candidates after year four and two after year eight. Pasqal left the program in September 2026 after completing Phase 1, so four companies remain.

In the United States, DARPA selected Alice & Bob for Stage A of its Quantum Benchmarking Initiative in April 2025, a six-month sprint in which companies had to show a credible path to a utility-scale quantum computer by 2033. Alice & Bob was not among the 11 companies that moved to Stage B in November 2025, though DARPA said at the time that companies not selected could still advance later. In October 2026 DARPA moved four of the Stage B companies, Atom Computing, Diraq, IBM and IonQ, into Stage C.

Challenges

A Logical Qubit Below Threshold

Lithium, Beryllium and Graphene all require a repetition code whose logical error rate falls as the code distance grows. Alice & Bob stopped short of that at distance 3 in October 2026, and its engineers name uneven coherence across the chip as the first problem to fix. AWS has run the same type of code below threshold at distance 5, with transmons for syndrome measurement. In Alice & Bob’s architecture papers the ancillas are cat qubits too, so the cat-to-cat CNOT needs a low phase-flip error, and the company has not published that error for its current chips.

From 12 Cat Qubits to 2,000

Graphene needs 2,000 cat qubits by 2030, more than 100 times the largest chip with reported error-correction results. Each cat qubit requires two resonators, a coupler and drive lines inside the refrigerator. The Cat Factory partners aim for fewer lines per cat qubit and a threefold smaller control-electronics footprint by 2027. Alice & Bob and ENS de Lyon hope DC biasing can replace microwave pumps with voltage lines, and Alice & Bob is adding its own fabrication and test capacity in the Paris lab. None of these has yet been tested at the scale of a multi-chip machine.

Logical Gates, Magic States and Decoding

The Lithium milestone, an error-corrected gate between two logical qubits, has not been shown with cat qubits. For Beryllium, Alice & Bob needs magic states: it ran its first non-Clifford gate on a cat qubit in 2026, and its low-cost distillation scheme has so far been tested only in theory and simulation. Real-time decoding at Graphene’s 1 µs cycle has not been shown either; the October 2026 GPU test ran offline on synthetic data.

Competition and Program Selection

Competitors have also moved. IBM plans Starling, a 200-logical-qubit machine running 100 million operations, for 2029. Google and AWS have both run error-correcting codes below threshold, and Iceberg Quantum claims RSA-2048 qubit counts for its qLDPC-based Pinnacle design in the same range as Alice & Bob’s. In 2023 Alice & Bob stood out for claiming far fewer physical qubits per logical qubit; by 2026 several qLDPC teams make similar claims for their own architectures. The next external tests of Alice & Bob’s position are the PROQCIMA year-four selection, due around 2028, and any DARPA decision to move it into a later QBI stage.

Funding and People

Alice & Bob has raised €180 million and employs more than 250 people. IBM, Google and AWS fund their quantum programs from corporate budgets. In my estimate, building and running a 2,000-cat-qubit Graphene, with a fab and a 20-refrigerator cryostat farm, will need another large funding round before 2030. NVIDIA’s investment and the French state’s backing through Bpifrance, France 2030 and PROQCIMA should help Alice & Bob raise it.

What I Will Watch Next

  • A repetition code below threshold on Helium hardware, at distance 5 or more, with the error rates published.
  • The κ2/κ1 ratio and CNOT error rates for the Galvanic Cat design, in a paper.
  • The 48-cat-qubit Lithium chip and a logical gate between two logical qubits.
  • Real-time decoding on GPUs during live error correction.
  • The PROQCIMA year-four selection and any further DARPA decision on the Quantum Benchmarking Initiative.

Alice & Bob grew out of a 2020 experiment showing that bit flips in an oscillator can be suppressed exponentially. Six years later the company has pushed that single-qubit result from the millisecond range to tens of minutes. To keep Graphene on its 2030 date, it now needs an error-correcting code that gets better as it grows, and it needs that result soon.

From the author

Marin Ivezic

I am the Founder of Applied Quantum (AppliedQuantum.com), a research-driven consulting firm empowering organizations to seize quantum opportunities and proactively defend against quantum threats. A former quantum entrepreneur, I’ve previously served as a Fortune Global 500 CISO, CTO, Big 4 partner, and leader at Accenture and IBM. Throughout my career, I’ve specialized in managing emerging tech risks, building and leading innovation labs focused on quantum security, AI security, and cyber-kinetic risks for global corporations, governments, and defense agencies. I regularly share insights on quantum technologies and emerging-tech cybersecurity at PostQuantum.com. I also founded and teach at Quantum Academy (QuantumAcademy.com) which trains and certifies professionals in post-quantum cryptography, quantum computing, networking and sensing.