Fidelity in Quantum Computing: The Nines That Decide Q-Day

Introduction

In June 2025, physicists at the University of Oxford ran randomized benchmarking on a single trapped calcium ion and measured an average error per Clifford gate of $$1.5\times10^{-7}$$. One mistake in 6.7 million operations. The qubit ran on microwave pulses from a chip-integrated resonator, at room temperature, without magnetic shielding, and it held its quantum state for about 70 seconds at a stretch. I covered the result when it was published in Physical Review Letters as the most accurate qubit operation ever recorded, and a year later it still is.

Five months after Oxford, Quantinuum launched Helios, a commercial 98-qubit trapped-ion machine whose two-qubit gates fail about once every 1,270 attempts, an average infidelity of $$7.9\times10^{-4}$$, taken over all of the machine’s operational zones, later confirmed in a peer-reviewed Nature paper. That is also a record: the best two-qubit performance any full processor has ever shipped with. Put the two records side by side and you get the picture that actually describes quantum computing in mid-2026. Single-qubit control is close to a solved problem. The two-qubit problem is the entire game—and it sits nearly four orders of magnitude behind.

Fidelity is the score that captures all of this. Formally it measures the overlap between the operation a quantum processor was asked to perform and the operation it physically performed, on a scale from 0 to 1. Practitioners quote it in nines: 99% is two nines, 99.9% is three, and each additional nine cuts the error rate by a factor of ten. (If any of the vocabulary in this piece is new, my quantum-cyber glossary covers it.) Qubit counts make headlines. Fidelity decides what those qubits can do, how many of them a cryptographically relevant quantum computer (CRQC) will need, and, through the error-correction mathematics I will walk through below, roughly when such a machine can exist.

Bottom line: the best processors already touch, on about a hundred qubits, the roughly 0.1% physical error rate that leading RSA-breaking estimates assume; the remaining distance to a CRQC is holding that number at hundreds to thousands of times the scale, around the clock, with readout, leakage, decoding, and calibration stability held to the same standard.

This piece rebuilds my 2023 fidelity article from scratch: what fidelity means mathematically, how it is measured and gamed, why single-qubit and two-qubit fidelity are different problems with different owners, where every hardware modality stood as of July 2026, and what all of it implies for the capability dimensions in my CRQC Quantum Capability Framework.

What Fidelity Actually Measures

The word covers a family of related quantities, and conflating them is the most common error in quantum reporting after the physical-versus-logical qubit confusion. Five members of the family matter for anyone assessing hardware claims.

State fidelity

The base definition, due to Armin Uhlmann (1976) and Richard Jozsa (1994), compares two quantum states described by density matrices $$\rho$$ and $$\sigma$$:

$$$F(\rho,\sigma)=\left(\mathrm{Tr}\sqrt{\sqrt{\rho}\,\sigma\sqrt{\rho}}\right)^{2}$$$

For two pure states the expression reduces to the squared inner product, $$F=|\langle\psi|\phi\rangle|^{2}$$, which is just the probability that a measurement designed to detect one state fires on the other. (I use the squared Jozsa convention throughout; some papers reserve the word fidelity for the unsquared root.) A fidelity of 1 means the states are identical; 0 means they are perfectly distinguishable. Strictly speaking fidelity is a similarity score rather than a distance (it violates the triangle inequality), but it bounds the trace distance $$D$$ on both sides through the Fuchs and van de Graaf inequalities:

$$$1-\sqrt{F(\rho,\sigma)}\;\le\;D(\rho,\sigma)\;\le\;\sqrt{1-F(\rho,\sigma)}$$$

That upper bound will return with teeth when we get to coherent errors.

Gate fidelity, average and worst case

For a gate, the question becomes: if the compiler requested the unitary $$U$$ and the hardware applied some noisy physical process $$\mathcal{E}$$, how close did it come? The average gate fidelity integrates the state fidelity over every possible input, weighted uniformly (the Haar measure):

$$$\bar{F}(U,\mathcal{E})=\int d\psi\,\langle\psi|\,U^{\dagger}\mathcal{E}\big(|\psi\rangle\langle\psi|\big)\,U\,|\psi\rangle$$$

A closely related quantity, the process (or entanglement) fidelity $$F_{\mathrm{pro}}$$, asks how well the gate preserves one half of a maximally entangled pair. The two are linked by a clean formula for a $$d$$-dimensional system:

$$$\bar{F}=\frac{d\,F_{\mathrm{pro}}+1}{d+1}$$$

so for a single qubit ($$d=2$$) the average fidelity is $$(2F_{\mathrm{pro}}+1)/3$$. When a vendor quotes “gate fidelity” without qualification, it almost always means the average gate fidelity extracted from randomized benchmarking, a protocol I dissect below.

The average is a forgiving judge. The rigorous fault-tolerance theorems are stated in worst-case (diamond-norm) error, engineering threshold studies assume explicit stochastic noise models, and for purely coherent errors, systematic over-rotations that add up in phase, the worst case scales as the square root of the average infidelity. Sanders, Wallman, and Sanders showed that a gate advertising a $$10^{-4}$$ average infidelity can, if its errors are coherent, be consistent with a worst-case error of order $$10^{-2}$$, and Kueng and colleagues turned that observation into hard bounds against the fault-tolerance threshold. A benchmarking number can therefore flatter a device by two orders of magnitude relative to what error correction will experience. Keep that asymmetry in mind whenever a single fidelity figure is doing a lot of promotional work.

Readout fidelity

Measurement is an operation too, and it fails in its own way. Readout performance is captured by a confusion matrix of conditional probabilities:

$$$M=\begin{pmatrix}P(0|0) & P(0|1)\ P(1|0) & P(1|1)\end{pmatrix}$$$

where $$P(i|j)$$ is the probability of reporting outcome $$i$$ when the true state was $$|j\rangle$$. The errors are usually asymmetric: in superconducting devices a qubit in $$|1\rangle$$ can relax to $$|0\rangle$$ during the measurement itself, so $$P(0|1)$$ exceeds $$P(1|0)$$. Fault tolerance needs more than accuracy here. It needs fast, repeatable, quantum-non-demolition measurement in the middle of a running circuit, because syndrome extraction, capability B.2 in my framework, packages ancilla preparation, entangling layers, and mid-circuit measurement into a cycle repeating at rates that approach a million per second on the fastest chips, without disturbing the data qubits.

From one gate to a whole circuit

Errors compound. For a circuit of $$N$$ gates with average infidelity $$\epsilon$$ per gate, and assuming the errors are independent, the probability the whole circuit runs clean decays exponentially:

$$$F_{\mathrm{circuit}}\approx(1-\epsilon)^{N}\approx e^{-N\epsilon}$$$

The independence assumption is generous; coherent errors can add linearly rather than diffusively, and correlated errors do worse still. Even the generous version is brutal, as the arithmetic in the next section shows.

Logical fidelity

Once physical qubits are woven into an error-correcting code, the number that matters becomes the logical error rate $$p_{L}$$, the chance that the encoded information is corrupted per cycle of error correction. For a code of distance $$d$$ operating on hardware with physical error rate $$p$$ below the code threshold $$p_{\mathrm{th}}$$, theory predicts exponential suppression:

$$$p_{L}\;\approx\;A\left(\frac{p}{p_{\mathrm{th}}}\right)^{\lfloor (d+1)/2\rfloor}$$$

Practitioners compress this into a single figure of merit, $$\Lambda$$, the factor by which the logical error rate drops each time the code distance grows by two. To first approximation $$\Lambda\approx p_{\mathrm{th}}/p$$: the further below threshold your physical fidelity sits, the faster redundancy converts into reliability. Every quantitative claim about CRQC timelines runs through this equation, which is why quantum error correction (capability B.1) and below-threshold scaling (capability B.3) anchor my framework.

The Arithmetic of Nines

Translate fidelity into circuit depth and the stakes stop being abstract. Using the decay formula above (with $$\epsilon$$ treated as an independent failure probability per gate), the table gives the number of gates a processor can execute before the odds of a clean run drop to 50%, and the depth at which 90% of runs still finish correctly.

Now put an actual workload against those budgets. Is three nines, the level the best full processors reach today, enough to run Shor’s algorithm against RSA-2048? Nowhere close, and the shortfall is not subtle. The leading compilations, Gidney and Ekerå’s 2019 construction among them, require on the order of billions of Toffoli operations, each decomposing into multiple two-qubit gates, so the raw circuit contains something like $$10^{10}$$ entangling operations. At $$10^{-3}$$ error per gate you would need to win a coin flip weighted $$e^{-10^{7}}$$ against you. No plausible bare-hardware error rate closes that gap without error correction; even the Oxford ion, extended magically to two-qubit gates, would fail such a circuit with near certainty. Error correction is mandatory, and error correction changes what fidelity buys.

Below threshold, fidelity stops being a linear good and becomes a compounding one. The code distance needed for a target logical error rate falls roughly in inverse proportion to $$\log\Lambda$$, so gains made close to threshold buy the most, and physical qubit cost per logical qubit grows with the square of distance in the surface code. My rough arithmetic, using the suppression formula with a starting logical error near $$10^{-3}$$ at distance 3, roughly $$2d^{2}$$ physical qubits per surface-code logical qubit, no routing or factory overhead, and an illustrative component-level target of $$10^{-12}$$: at $$\Lambda=2$$, roughly where Google sits today, you need distance around 60 and on the order of 7,000 to 8,000 physical qubits per logical qubit. At $$\Lambda=4$$ the distance drops near 33 and the cost to roughly 2,200. At $$\Lambda=10$$ you are near distance 21 and about 900 physical qubits per logical qubit. Those are back-of-envelope figures, and code-dependent constants move them around, but the shape is the point: a twofold improvement in physical error rate shrinks the machine by a factor of three to four and shortens the computation too.

There is a second lever besides better qubits, which is better codes. Quantum low-density parity-check (qLDPC) codes such as IBM’s bivariate bicycle construction encode 12 logical qubits in 288 physical qubits (144 data plus 144 checks) with protection that matched, in IBM’s simulations at $$p=10^{-3}$$, surface-code implementations roughly ten times larger, and the theory behind them (Panteleev and Kalachev, 2022) shows the overhead advantage grows with scale. I analyzed how qLDPC codes, magic state cultivation, and algorithmic fault tolerance are jointly compressing resource requirements in my error-correction deep dive, so I will not repeat it here. The relevant fact for this piece: every one of those constructions still demands physical two-qubit error at or below the $$10^{-3}$$ level, and most of them reward $$10^{-4}$$ handsomely. The codes reduce how many good qubits you need. They do not excuse bad ones. The nines are the timeline.

Why Two-Qubit Fidelity Is the Number That Counts

The practical difference between single-qubit and two-qubit fidelity is, to my thinking, the most under-explained topic in hardware assessment. Vendors quote whichever number flatters them, and the two differ by one to four orders of magnitude on every platform for reasons rooted in physics rather than engineering immaturity. The second number governs everything.

Why entangling gates are so much harder

A single-qubit gate asks a well-isolated quantum system to rotate on command. The engineering brief is internally consistent: isolate the qubit from everything, then talk to it through one narrow, exquisitely calibrated channel. Oxford’s $$1.5\times10^{-7}$$ shows how far that brief can be taken when the qubit is an atomic clock transition, every control error has been hunted down to the $$10^{-8}$$ level, and coherence stretches past a minute.

A two-qubit gate asks two of those isolated systems to interact strongly, on demand, and then stop. The brief now contradicts itself. The coupling channel you open to generate entanglement is a channel through which noise, leakage, and crosstalk travel too. Every platform pays for this in its own currency. Superconducting transmons entangle through couplers whose activation drags the qubits near frequency collisions and leaks population into the non-computational $$|2\rangle$$ state. Trapped ions entangle through a shared motional mode, so the gate inherits every quantum of stray heating and every wobble of laser phase over tens to hundreds of microseconds. Neutral atoms entangle through Rydberg states whose finite lifetime sets an error floor the pulse designer can only approach. Silicon spin qubits entangle through the exchange interaction, which is exponentially sensitive to gate voltage and therefore to charge noise. In each case the entangling resource is also the dominant error channel. That is why the platform-by-platform ratio between single- and two-qubit error is never close to one.

The calibration burden compounds the physics. A single-qubit gate has a handful of parameters; a two-qubit gate on a large chip has dozens, and they drift, and they interact with the parameters of neighboring gates when everything runs simultaneously. In our Applied Quantum lab in Delft, two-qubit calibration is the phase of a processor bring-up that eats the calendar: characterize the coupler, tune the conditional phase, cancel the residual ZZ interaction, benchmark, watch it drift overnight, and start again. (Somewhere in every quantum lab on earth, a calibration job is failing at 3 a.m. because a two-level defect wandered onto a qubit frequency. The field’s dirty secret is how much of “fidelity” is really “maintenance.”)

The gap in numbers

The ratios are indicative rather than exact, since protocols and scopes differ across rows; the modality section further down carries the caveats. Two consequences follow from the ratio itself, and they are worth spelling out because they change how you should read any spec sheet.

First, compiled algorithms are priced in two-qubit gates. Single-qubit rotations are so cheap and clean that circuit cost models simply count entangling operations; when IBM says Nighthawk supports circuits of 5,000 two-qubit gates, the single-qubit count is not even mentioned. On sparse-connectivity chips the accounting is harsher still, because interacting two distant qubits requires chains of SWAP operations, each built from entangling gates, so limited qubit connectivity (capability B.4 in my framework) silently multiplies the two-qubit gate count and divides the effective circuit fidelity. All-to-all architectures like Quantinuum’s and SQC’s dodge that tax; grid architectures pay it on every long-range interaction.

Second, error correction itself is mostly two-qubit gates. A surface-code syndrome cycle is four entangling layers plus a measurement, repeated forever. When people say the fault-tolerance threshold is around 1%, they mean, in engineering terms, that the two-qubit gate and the measurement must clear that bar under full simultaneous load. A processor with five-nines single-qubit gates and 98.5% entangling gates is above threshold and cannot error-correct its way anywhere. Two-qubit gates set the clock.

Median, mean, and the golden pair

A processor does not have “a” two-qubit fidelity. It has a distribution of them, one per calibrated pair, and the honest summary of that distribution is the median under simultaneous operation, with the tails and their spatial clustering disclosed. What often gets quoted instead is the best pair ever measured, in isolation, on a good day. (Marketing departments have an unerring instinct for the golden pair.) The difference is decisive for error correction, because a code cycle runs every gate on the chip at once, and the code’s performance is dragged toward its worst participants, a point the SQC team made well when it emphasized that the floor of its 11-qubit processor was 99.1% rather than trumpeting only the 99.9% ceiling.

The industrial revolution solved exactly this problem once, and the parallel is worth two minutes. In 1785 the French gunsmith Honoré Blanc assembled working musket locks from bins of randomly chosen parts in front of skeptical officials (Thomas Jefferson watched, and wrote home about it), and through the 1820s and 1830s John Hall’s rifle works at Harpers Ferry turned the idea into manufacturing discipline. The enabling technology was never better craftsmanship on individual components; the armories’ hero machinists could already produce a perfect part. It was gauging: go/no-go measurement discipline that forced every part into tolerance so that any part would fit any rifle. A CRQC is an interchangeable-parts problem of roughly a million components. Its designers do not need one heroic qubit pair at $$10^{-4}$$; they need the worst pair they cannot route around to clear $$10^{-3}$$ while everything runs at once. Randomized benchmarking and its relatives are the go/no-go gauges of this industry, and the number they must certify is the median and the floor. The gauges made the parts.

That is also why I treat manufacturability (capability E.1) as a fidelity capability and never a separate concern. The Diraq and imec result, four devices from a standard 300 mm line all above 99% on every operation, moved my assessment more than a single-pair record from a hand-tuned academic device would have, because uniformity at fidelity is the thing a CRQC actually consumes.

Readout is the third number, and often the worst

Between the gate figures on a spec sheet sits a quieter one that now often dominates real error budgets: measurement. On Google’s Willow, single-qubit gates err at 0.035% and CZ gates at 0.33%, but repetitive measurement errs at 0.77%, which makes readout the single largest error channel in the machine’s own spec sheet. Quantinuum’s combined state-preparation-and-measurement error is 0.033%, though the sequence takes orders of magnitude longer than a transmon readout. Since a fault-tolerant computer spends its life measuring syndromes, readout fidelity and readout speed jointly gate syndrome extraction, and I score them there in the framework. When a vendor’s announcement mentions gates and stays silent on measurement, that silence is usually load-bearing information.

How Fidelity Is Measured, and How to Read the Claims

A fidelity number without its measurement protocol is an adjective. The protocols differ in what they include, what they hide, and how easily they scale, so knowing them is the difference between reading a spec sheet and being read to.

Process tomography

Quantum process tomography reconstructs the full mathematical description of a gate by preparing a complete set of input states and measuring a complete set of outputs. It is the most informative characterization and the least scalable: the experimental cost grows as $$16^{n}$$ for an $$n$$-qubit operation, and worse, the result is contaminated by state preparation and measurement (SPAM) errors, so a mediocre readout can slander a good gate. Tomography remains a calibration workhorse for one and two qubits and is hopeless beyond that.

Randomized benchmarking

Randomized benchmarking (RB), introduced by Knill and colleagues and formalized by Magesan, Gambetta, and Emerson, is the industry-standard answer to the SPAM contamination problem, and it is the protocol behind nearly every headline fidelity you have ever read. The scheme: apply a random sequence of $$m$$ Clifford gates, append the single Clifford that undoes the whole sequence, measure whether the qubit returned home, and repeat across many random sequences and many lengths. The survival probability decays as $$P(m)=A\,p^{m}+B$$, and the decay constant $$p$$ yields the average gate fidelity through

$$$\bar{F}=1-\frac{(d-1)(1-p)}{d}$$$

The elegance is that preparation and measurement errors only shift the constants $$A$$ and $$B$$; the decay rate isolates the gates themselves. The fine print is that RB assumes the noise is stable in time, roughly independent of which gate is applied, and free of memory effects, assumptions real hardware bends. It also benchmarks Clifford gates compiled from native operations, so the number is a per-Clifford average rather than the fidelity of the exact gate your algorithm will call. Interleaved RB (Magesan and colleagues, 2012) targets one specific gate by alternating it with random Cliffords, at the price of a systematic uncertainty that can be a large fraction of the extracted error itself; interleaved results quoted without that uncertainty deserve a raised eyebrow.

Cross-entropy benchmarking

Cross-entropy benchmarking (XEB) came out of Google’s 2019 quantum supremacy experiment: run random circuits, sample the outputs, and score how much the measured distribution leans toward the ideal one computed classically, with $$F_{\mathrm{XEB}}=2^{n}\langle P_{\mathrm{ideal}}(x)\rangle-1$$. It scales to whole processors and captures crosstalk under realistic load, which per-pair RB misses. Its weaknesses: it needs classical simulation of the ideal circuit, capping the regime where it can be verified, and it can be spoofed by classical algorithms that concentrate on the score rather than the physics, as Gao and colleagues showed. XEB fidelity is also a global average that says little about which operations are failing. It is a fine thermometer and a poor diagnosis.

Gate set tomography and cycle-level methods

Gate set tomography (GST), developed at Sandia by Blume-Kohout and colleagues, characterizes the gates, preparations, and measurements together, self-consistently, with error bars, and it distinguishes coherent from stochastic errors, which RB deliberately averages away. The cost is heavy analysis and small system sizes. It earns its keep exactly where the diamond-norm subtlety from earlier lives: GST on the Diraq devices is how the team could attribute the residual infidelity to nuclear-spin noise in the silicon rather than to control electronics, which in turn tells you the fix is isotopic purification rather than better pulses. Above the few-qubit scale, cycle benchmarking (Erhard and colleagues) and mirror-circuit methods (Proctor and colleagues) estimate the error of whole layers of parallel gates, which is the quantity an error-correcting code actually experiences and, unsurprisingly, it is usually worse than the isolated per-pair numbers.

My five questions for any fidelity claim

I keep a short interrogation list for vendor announcements, and I apply it in order. One: which protocol produced the number (RB, interleaved RB, XEB, or something bespoke), with the uncertainty stated. Two: whether it is the median across the device or a best pair, and whether the vendor will publish the distribution. Three: whether it was measured with the rest of the chip running simultaneously or in isolation. Four: the accompanying readout, SPAM, and leakage figures, since a gate number without them is a torso. Five: the gate speed and the wall-clock period over which the number was sustained, since a fidelity that holds for an afternoon of cherry-picked calibration is a different product from one that holds through a week of unattended operation. A claim that answers all five is engineering. A claim that answers one is a press release, not a specification. The distinction between the two is most of my job, and it is the same discipline I apply when pushing back on quantum panic from the other direction.

The Threshold, and What Living Below It Buys

The theoretical foundation under all of this is the fault-tolerance threshold theorem, proved in the late 1990s by Aharonov and Ben-Or, Kitaev, and Knill, Laflamme, and Zurek. It says that if the physical error rate per operation sits below a code-dependent critical value, arbitrarily long quantum computations become possible with overhead that grows only polylogarithmically. Above that value, for the code and noise in question, error correction is counterproductive: the extra gates and measurements of each syndrome cycle inject more errors than the code removes, and growing the code makes the machine worse. The threshold is a cliff edge in capability, which is why so much of the past decade reduces to a fight over a fraction of a percent.

The value of the threshold depends on the code and, heavily, on the noise. For the surface code under realistic circuit-level noise, the canonical estimates from Fowler, Mariantoni, Martinis, and Cleland put it between roughly 0.5% and 1% per operation. Codes tailored to biased noise, such as the XZZX variant, push their thresholds severalfold higher against the dominant error type, which is the entire commercial thesis of cat-qubit companies. In engineering terms the requirement stack reads: two-qubit gates around or below $$10^{-3}$$, single-qubit gates below $$10^{-4}$$, measurement around $$10^{-3}$$ and fast, leakage well below $$10^{-3}$$ with active removal, and all of it simultaneous and stable.

For more than a decade after the surface-code blueprint turned the theorem into an engineering roadmap, no hardware demonstrated its central promise. Then, within about 12 months, the demonstrations arrived.

Google’s Willow came first, in December 2024, with the Nature result that gave this era its benchmark numbers: growing a surface code from distance 3 to 5 to 7 on a 105-qubit processor cut the logical error rate by $$\Lambda=2.14\pm0.02$$ per step, ending at a 101-qubit distance-7 logical memory with 0.143% error per cycle at 909,000 error-correction cycles per second; in a companion distance-5 configuration, a real-time decoder kept pace with that stream at a mean decision latency of 63 microseconds; the distance-7 memory itself was decoded offline. The logical qubit outlived the chip’s best physical qubit by a factor of 2.4, the first unambiguous below-threshold operation in history and the direct payoff of Willow’s physical fidelities (0.035% single-qubit, 0.33% CZ, 0.77% measurement). Google has since shown the same processor running error correction on an entirely different gate set, with an iSWAP-based dynamic surface code reaching $$\Lambda=1.56$$ in January 2026, evidence that below-threshold operation is a property of the platform now rather than a one-off configuration.

In November 2025, the Harvard, MIT, and QuEra collaboration demonstrated a 448-atom architecture that suppressed errors below threshold in its characterization circuits while integrating, for the first time in one system, the full fault-tolerance repertoire: transversal logical gates, magic-state preparation, mid-computation atom replacement, and logical teleportation (Harvard’s announcement is unusually readable). I called it the most consequential neutral-atom result to date in my coverage, and I stand by that.

And Quantinuum’s Helios, with its $$7.9\times10^{-4}$$ entangling gates, converted fidelity headroom into logical performance of a different kind: 48 encoded logical qubits from 98 physical ones using high-rate error-detecting codes at a 2-to-1 ratio, postselection included, plus a 94-logical-qubit entangled GHZ state at lighter encoding. A distance-2 detecting code is a different instrument from Google’s distance-7 correcting memory, and the two results answer different questions rather than compete on one scoreboard. The shared lesson is what the nines arithmetic predicted: the further below the relevant threshold the physical gates sit, the less redundancy a given logical standard costs, and a 2-to-1 ratio is unreachable for hardware near threshold. Fidelity is the exchange rate between the qubits you build and the qubits you can use.

One capability in the stack deserves a special flag because fidelity feeds it twice: non-Clifford operations. Error-corrected machines execute logical Clifford gates (capability C.1) relatively cheaply, but Shor-class algorithms also need T gates, which require magic states (capability C.2), and producing those at quality has historically been the most expensive line item in any CRQC design. Higher physical fidelity cuts that cost nonlinearly: Quantinuum’s 2025 magic-state work and Gidney’s magic state cultivation both exploit hardware in the $$10^{-3}$$-to-$$10^{-4}$$ range to shrink distillation overhead by an order of magnitude or more. When you hear that resource estimates for breaking RSA keep falling, roughly half the story is better codes and factories, and better codes and factories are themselves purchased with physical nines.

Where Every Modality Stands in Mid-2026

The table condenses the state of play, with scopes and protocols differing across rows, so cross-row comparisons are order-of-magnitude at best; the prose after it carries the caveats, which are where the truth lives. All figures are the best publicly documented results as of July 2026, with the measurement caveats flagged. Modality primers live in my taxonomy of quantum computing modalities.

The trapped-ion column leads on every accuracy metric, and the reasons are physical rather than circumstantial. Every ion of a given isotope is identical, so there is no fabrication spread to gauge away; the qubit states are atomic clock levels with effectively unlimited energy-relaxation lifetime; and fluorescence readout discriminates states almost perfectly. Helios, with its barium qubits, junction-linked trap regions, and all-to-all connectivity, is the reference machine of the era, and its numbers bear repeating because they are averages over a whole commercial system rather than lab conditions: $$2.5\times10^{-5}$$ single-qubit, $$7.9\times10^{-4}$$ two-qubit, $$3.3\times10^{-4}$$ SPAM. Above the full-system tier sit the small-prototype records: Oxford Ionics reported 99.97% two-qubit fidelity on a two-ion chip in 2024, and IonQ, which acquired the company, announced in October 2025 that its electronically controlled prototypes had crossed 99.99%, four nines on an entangling gate. That claim comes from company technical papers on an R&D device rather than a shipped processor, so I file it as demonstrated physics awaiting system integration on the 256-qubit machines IonQ has promised for 2026; the claim-versus-evidence distance here is exactly the gap between a two-ion chip and a Helios-class average, and it took Quantinuum years of engineering to close the equivalent gap once.

Superconducting circuits trade accuracy for speed, three orders of magnitude of speed, and the trade defines the modality. Willow’s mean simultaneous CZ error of 0.33% looks a factor of four behind Helios until you recall that Willow runs a full error-correction cycle in 1.1 microseconds, faster than a single Helios two-qubit gate. Its sibling chip tuned for random-circuit sampling posts iSWAP-class gates at 0.14%, the best two-qubit figure ever reported on a 100-qubit-scale superconducting device. IBM sits close behind: Heron R2 brought median two-qubit error near 0.3%, and the Nighthawk generation (120 qubits, 218 tunable couplers, first units in service since late 2025) targets circuits of 5,000 entangling gates now and 15,000 by 2028, alongside the Loon test chip that carries IBM’s qLDPC wager and a decoder demonstration with AMD that decodes a full 12-cycle syndrome window of the gross code in 480 nanoseconds, about 40 per cycle, on an off-the-shelf FPGA. The modality’s fidelity ceiling is a materials problem (two-level defects, quasiparticles) plus a crowding problem (frequency collisions as chips grow), and the gap to trapped ions has persisted even as both platforms improved.

Neutral atoms spent the decade as the connectivity-and-scale play with second-tier gates, and the gates are catching up fast. The Evered result put Rydberg CZ gates at 99.5% across 60 pairs in parallel in 2023; ytterbium arrays reached 99.4% twice in 2025, through Rydberg-state modeling at Princeton and independently with Atom Computing’s universal gate set; and an April 2026 preprint from the Harvard and MIT group pushed pair-level CZ fidelity to 99.854%, 99.941% with atom loss postselected away, holding that performance for 10 hours without recalibration. The platform’s larger statement was the November 2025 fault-tolerant architecture on 448 atoms, which paired mid-pack physical fidelity with movable qubits, erasure-biased errors, and continuous atom reloading demonstrated separately on a 3,000-qubit system running for over two hours. Neutral atoms are the clearest illustration that fidelity is necessary and never sufficient: their architecture extracts more logical performance from a given physical error rate than fixed grids have so far managed.

Silicon spin qubits are the manufacturability play, and 2025 was the year the fidelity numbers started justifying it. SQC’s 11-qubit donor processor set the silicon two-qubit record at 99.9% with every operation in the system above 99.1%, and the Diraq and imec unit cells delivered above-99% everything from a standard 300 mm CMOS flow, with gate set tomography tracing the residual errors to isotopic impurities that purification can remove. Neither result is large, and silicon’s challenge remains operating dense arrays with control crosstalk at scale, but the modality now clears the threshold bar on devices from a standard 300 mm CMOS foundry flow, a sentence no other platform can write yet.

Photonics does not fit the gate-fidelity frame and I resist bending it to fit. Individual linear-optical components err at the $$10^{-4}$$ level or better; the modality’s real currency is photon loss, which behaves as a heralded erasure error with far more forgiving thresholds than depolarizing noise, and its viability question is component loss, source quality, and multiplexing yield across millions of parts rather than any per-gate number. The honest comparison metric for photonic platforms is loss budget per fusion attempt, a topic for its own article.

The exotic entries round out the field. Cat qubits (AWS Ocelot, Alice and Bob) buy an exponential suppression of bit flips at the hardware level and then need only a thin repetition code for phase errors, an architectural bet that effective fidelity can be engineered into the qubit rather than benchmarked out of it. Microsoft’s topological program makes the same promise in stronger form and has, in my view, the widest gap in the industry between claim and independently verifiable evidence. I compared these architectures in my survey of the fault-tolerance race and my assessments there stand.

Speed Turns Fidelity Into Capability

Fidelity tables invite a ranking, and the ranking misleads, because a CRQC is judged in wall-clock time and gates are priced per second as well as per error. A superconducting entangling gate takes tens of nanoseconds; an ion gate, counting transport in a real architecture, takes tens to hundreds of microseconds. So while Helios makes roughly four times fewer errors per gate than Willow, Willow executes on the order of a thousand gates in the time Helios executes one. Per unit of wall-clock time, the fast machine gets more correct work done; per gate, the accurate machine wastes less of the error-correction budget. Neither number alone tells you which platform reaches cryptanalytic scale first.

The place this bites hardest is the error-correction cycle, since a fault-tolerant computation is nothing else repeated billions of times. Willow runs 909,000 surface-code cycles per second. Ion and atom systems today run their logical cycles in milliseconds, a thousandfold slower, because transport, cooling, and imaging sit inside the loop. Now recall that Craig Gidney’s 2025 resource estimate, the current reference point for breaking RSA-2048 with under a million qubits in days rather than decades, assumes microsecond-class cycles and $$10^{-3}$$ physical error throughout. Hold everything else fixed and run that computation at millisecond cycles: the days become a decade or more, my arithmetic rather than his, and the machine stops mattering for cryptography on any planning horizon. Slower platforms answer with better exchange rates (fewer physical qubits per logical, cheaper long-range operations, transversal gates), the 10,000-atom Shor proposals I return to below accept months to years of runtime as the price of small qubit counts, and the neutral-atom architecture in particular converts qubit mobility into shortcuts that fixed grids buy with time. The tax is negotiable; it has never been waived. But the general point stands and I weight it heavily in my Q-Day modeling: the CRQC-relevant metric is high-fidelity logical operations per second, sustained, which is why decoder throughput (capability D.2) and continuous operation (capability D.3) sit in my framework as peers of gate quality rather than footnotes to it. A machine that holds today’s best fidelities for milliseconds at a time does not threaten a single certificate.

The Errors the Averages Hide

Average gate fidelity is one number summarizing a zoo, and several members of the zoo are more dangerous than their contribution to the average suggests. These are the residuals I look for in supplementary materials, because they decide whether a headline fidelity will translate into the logical performance the suppression formula promises.

Coherent errors come first. A systematic over-rotation compounds in amplitude, the angle growing as $$N\theta$$ over $$N$$ gates so the infidelity can grow as $$N^{2}$$, while independent stochastic errors accumulate infidelity roughly linearly, and the square-root relationship between average and worst-case error from earlier means benchmarking under-reports them by construction. The practical countermeasure is randomized compiling (Wallman and Emerson), which scrambles gate frames so coherent errors average into stochastic ones the code can digest; it is now common in serious error-correction experiments and still rare on spec sheets.

Leakage is next: population escaping the two computational levels entirely, into a transmon’s $$|2\rangle$$ state or an atom’s wrong hyperfine level. Standard stabilizer decoders have no symbol for a leaked qubit, so one spreads damage through every entangling gate it touches until dedicated circuitry detects and removes it. Willow’s below-threshold result depended on dedicated leakage-removal circuitry between cycles, and its spec sheet lists the reset pathways as prominently as the gate errors, correctly. Leakage per gate around $$10^{-3}$$ with removal is workable; without removal, no headline fidelity saves you.

Crosstalk and correlated errors attack the assumption underneath the threshold theorem itself, which prices errors as independent events. Driving one gate shifts its neighbors; a single high-energy particle strike can flip thousands of qubits across a superconducting die at once, an effect McEwen and colleagues measured at a rate of roughly one burst per 10 seconds before mitigation, each one briefly overwhelming any code. Gap engineering and better shielding have since pushed burst rates down by orders of magnitude, and distributed architectures dilute the blast radius, but correlated events remain the tail risk in every logical-error budget and one reason I discount extrapolations built purely from average fidelities.

Drift is the least glamorous member and the one operators feel daily: fidelity is a time series, and the quoted value is a snapshot near a calibration. Two-level defects migrate, lasers wander, couplers age. (The counterexamples are worth watching: a fluxonium team reports, in a preprint, holding a two-qubit gate above 99.9% for 24 days without recalibration, and the 2026 neutral-atom result above ran 10 hours untouched.) The engineering answer is automated recalibration woven into operation, and the strategic answer is that any fidelity claim should carry a duration, which is precisely capability D.3 in the framework and question five on my interrogation list.

The most interesting recent development in this zoo is the deliberate conversion of bad errors into good ones. Erasure conversion engineers qubits so that their dominant failure announces itself—at a known location—which codes correct far more cheaply than silent errors; thresholds against heralded loss run several times higher than against depolarizing noise. Neutral atoms get this partly for free (a lost atom is visible), metastable-state ion and atom qubits and dual-rail superconducting qubits are being designed for it deliberately (Wu, Kolkowitz, Puri, and Thompson’s proposal set off the current wave), and I covered the architecture implications in my piece on erasure-qubit fault tolerance. Ten years ago the field asked how small errors could get. The sharper 2026 question is how legible they can get.

What a CRQC Actually Requires

Time to assemble the pieces into the question this site exists to answer. The resource-estimation literature for breaking RSA-2048 has moved from Gidney and Ekerå’s 20 million noisy qubits in 2019 to Gidney’s under-one-million-qubit construction in 2025 (still a preprint, and I flag it as such), with the logical-qubit floor pushed toward 1,730 by residue-arithmetic circuits, and a steady supply of less rigorous shortcuts I have had to debunk along the way. The 2026 entries widen the range instead of narrowing it: Iceberg Quantum’s Pinnacle architecture claims RSA-2048 under 100,000 physical qubits with qLDPC codes, resting on decoding, connectivity, and month-scale operation assumptions I examined critically when the preprint dropped, and a Harvard and Caltech team argues in another 2026 preprint that Shor-class runs are possible on roughly 10,000 reconfigurable atomic qubits, at runtimes stretching toward years. Nearly every entry prices its machine against the same class of physical assumption: uniform error in the $$10^{-3}$$ to $$10^{-4}$$ range, held across the entire device, for the duration of the run. Fidelity is the load-bearing assumption of the entire cryptanalytic threat model. So here is my working scorecard of what a CRQC-class machine requires against what mid-2026 hardware has shown, mapped to the capabilities in my framework where I track each one.

Read down the middle column and the honest summary writes itself. On raw gate accuracy, the field has arrived: the entry-ticket number that every RSA estimate assumes is now demonstrated hardware on roughly a hundred qubits, and prototype results a full order of magnitude better already exist. Reaching a CRQC no longer requires any new physics of fidelity. What it requires is the industrialization of fidelity, the Harpers Ferry problem: the same nines, at hundreds to thousands of times the component count, with the supporting cast (measurement, leakage handling, decoding, stability) held to the same tolerance for days at a stretch, and none of that has been demonstrated by anyone. This is why my CRQC Readiness Benchmark treats scaled median fidelity, sustained operation, and decoder throughput as separate dials rather than folding them into a qubit count, and why quantum computers have still factored nothing larger than toy numbers despite gate fidelities that, on paper, cleared the threshold years ago.

Concretely, these are the fidelity-linked milestones that would move my Q-Day estimate if they appeared, in descending order of weight. A median simultaneous two-qubit error at or below $$10^{-3}$$ on a device of 1,000-plus qubits, any modality, published with the distribution. A sustained $$\Lambda$$ of 4 or better over hour-scale runs with real-time decoding in the loop. A logical entangling operation between distant logical qubits at $$10^{-6}$$ error or better, a waypoint toward the far lower rates a full Shor run demands of the primitive it consumes by the billion. Magic-state production at target fidelity and volume on hardware rather than in simulation. And a week of unattended operation at specification on any machine of more than a few hundred qubits. None of these existed as of July 2026. Two or three of them appearing within a year of each other is what the beginning of the CRQC endgame will look like, and fidelity metrics will announce it before qubit counts do.

What I Watch, and What You Should Do

For readers who track this field to time their defenses rather than to build machines, three habits follow from everything above. Track the median, never the record: a single golden pair moves no timeline, while a shifted median on a large device moves every timeline. Demand the protocol behind every number, using the five questions from earlier, because a fidelity without a benchmark, a distribution, and a duration is marketing with a decimal point. And read fidelity together with speed and stability, since the threat is denominated in sustained logical operations per second rather than in any per-gate figure of merit.

And then act on the part that fidelity progress does not change. Your migration deadline was never going to be set by a physics milestone; regulators, insurers, and customers have already set it, and the harvest-now-decrypt-later exposure on long-lived data has been running since before Willow was a design file. The nines tell you how fast the storm is organizing. They were never a reason to delay the work.

I keep coming back to that calcium ion in Oxford, running for a minute at a stretch and failing once in 6.7 million tries, because it settles an old argument. For 30 years, one respectable position held that quantum hardware would sink somewhere in the mud between two nines and the threshold, and that fault tolerance would stay a theorem. That position is now empty: single-qubit control is approaching seven nines, full commercial systems entangle at better than three, below-threshold scaling has been shown on superconducting and neutral-atom hardware, and 48 encoded logical qubits ran on a machine you can rent. What remains between here and a CRQC is a decade-scale industrial grind, making a million components as trustworthy as one, and every step of that grind will be visible, in advance, in exactly one place. Watch the nines.