QuantWare

(This profile is one entry in my 2025 series on quantum hardware roadmaps and CRQC risk. For the cross‑vendor overview, filters, and links to all companies, see Quantum Hardware Companies and Roadmaps Comparison 2025.)

Introduction

QuantWare is a Delft, Netherlands-based quantum computing startup that provides superconducting quantum processors as off-the-shelf products. Founded in 2021 as a spin-out from TU Delft’s QuTech institute by Matt Rijlaarsdam and Alessandro Bruno, the company aims to be the “Intel of quantum computing” by supplying affordable, high-quality quantum QPU (quantum processing unit) chips for others to build full quantum systems. QuantWare launched the world’s first commercially available superconducting QPU in 2021 – a 5-qubit device called Soprano – marking the first time superconducting quantum chips were productized “off the shelf” for general purchase. Superconducting qubits are one of the most mature quantum hardware modalities (used by Google and IBM to achieve milestones like quantum supremacy), and QuantWare’s strategy leverages this maturity while dramatically lowering entry barriers for new quantum players.

QuantWare has rapidly established itself as a key enabler in the quantum ecosystem. Its processors are used by customers in 20+ countries, and the company was the first to power working quantum computers in at least five different countries’ quantum programs. By making quantum hardware more accessible (delivering chips in weeks instead of years), QuantWare allows organizations to focus on software and applications rather than reinventing hardware from scratch. The company’s unique technological centerpiece is its VIO™ 3D QPU architecture, which uses chiplets and vertical interconnects to break through scaling bottlenecks in superconducting qubit design. In essence, QuantWare is building the backbone of an open, modular quantum computing supply chain – selling high-performance quantum chips “off the shelf” so that others can assemble quantum computers much like classical computer makers assemble PCs.

Milestones & Roadmap

2021 – Founding and First QPU: QuantWare was founded and quickly launched Soprano, a 5-qubit superconducting processor, in mid-2021. This was the world’s first commercially available superconducting QPU, a significant milestone in democratizing quantum hardware. With single-qubit fidelities reported around 99.9%, Soprano provided research labs an “Intel 4004 moment” – a basic quantum chip they could buy and experiment with immediately, rather than needing to fabricate their own. This launch proved that superconducting qubits (the same technology used in Google’s and IBM’s devices) could be productized and delivered as a component, setting QuantWare’s vision in motion.

2022 – 25-Qubit Processor and Expansion: In March 2022, QuantWare unveiled Contralto, a 25-qubit QPU, bringing state-of-the-art qubit counts within reach of any organization. At the time, 20+ qubit chips were available only in a few elite labs; Contralto’s release meant that a broad range of companies or institutes could obtain a large superconducting chip within 30 days of order. The Contralto processor is highly customizable – buyers can request custom qubit topologies or added chip features (e.g. Purcell filters, asymmetric SQUID junctions) to suit their needs. By late 2022, QuantWare had tripled its staff and was shipping processors to customers across four continents, validating strong market demand for off-the-shelf quantum hardware. Notably, the company also began positioning itself for larger scales: Contralto’s successor was hinted to use a new proprietary architecture enabling rapid scaling beyond 25 qubits.

2023 – Partnerships and Scaling Up: QuantWare’s hardware started powering several national quantum initiatives. It was selected to supply the QPUs for Israel’s first quantum computer (in collaboration with Quantum Machines), highlighting trust in its technology for a high-profile national project. In mid-2023, QuantWare’s Soprano chip also became the core of Spain’s first quantum computer (built by Qilimanjaro and integrated into the Barcelona Supercomputing Center). These achievements demonstrated the viability of an open architecture approach: in both cases, the quantum computers were assembled from components by different vendors (QuantWare for the processor, others for control electronics and software), much like classical computer assembly. On the corporate side, QuantWare closed a €6 million seed funding round in early 2023 to scale up its team and develop a next-generation 64-qubit chip called Tenor. The Tenor QPU introduced a 3D wiring approach, bringing control lines vertically from above the chip, which enables multiple modules to “stick together” for larger systems. QuantWare also launched new services in 2023 – a foundry service to help others fabricate custom superconducting designs, and a cryogenic amplifier product – signaling its intent to support the entire quantum stack and ecosystem. By the end of 2023, QuantWare had effectively proven it could double or more the qubit count of its processors annually (5→25→64 qubits) and had become a trusted supplier for quantum R&D worldwide.

2024 – Focus on Error Correction and Medium-Scale Systems: Building on the Tenor architecture, QuantWare prepared to bridge into fault-tolerant scale. It developed Contralto-A, a 17-qubit processor specifically designed for quantum error correction (QEC) experiments. Contralto-A, introduced to select partners in 2024, features a QEC-optimized layout with flux-tunable couplers and individual Purcell filters on each qubit. At 17 qubits, it’s more than twice the size of other QEC-focused test chips, enabling researchers to attempt a distance-3 surface code (which requires 17 physical qubits per logical qubit) on a single device. This was the largest commercially available chip for error-correction research, positioning QuantWare at the forefront of hardware for fault-tolerance. [1] These steps in 2024 solidified QuantWare’s roadmap of simultaneously scaling up qubit count and improving qubit quality (for error correction). They also set the stage for the company’s next leap: moving from tens of qubits to thousands.

2025 – KiloQubit Era and VIO-40K Announcement: 2025 was a breakout year for QuantWare. In mid-2025, the company raised an oversubscribed $27 million Series A financing to establish its own dedicated fabrication facility and accelerate towards million-qubit processors. Armed with new capital, QuantWare announced a scaling breakthrough: its proprietary VIO-40K architecture will enable 10,000-qubit superconducting processors by combining modular chiplets in a 3D-stack. In this design, up to 40,000 vertical input/output lines connect stacked chiplets with “ultra-high-fidelity” links, effectively stitching many smaller qubit arrays into one large, seamless processor. The approach removes the usual wiring-density limits that had kept single-chip devices below ~100 qubits. QuantWare opened reservations for the first 10K-qubit VIO processors, with deliveries expected in 2028, and concurrently broke ground on “KiloFab,” a new Delft facility to mass-produce these 3D QPUs (scaling production capacity 20× by 2026). In the meantime, QuantWare continued to push intermediate milestones. In October 2025, its Contralto-A chip won the Quantum Effects 2025 award for Best Quantum Hardware, recognizing it as the industry’s largest and most advanced QEC-focused processor. And in November 2025, QuantWare teamed up with control electronics specialist Qblox and quantum software firm Q-CTRL to launch the Quantum Utility Block (QUB) – a pre-integrated, modular quantum computer blueprint offering small (5 qubit), medium (17 qubit), and large (41 qubit) systems that are “pre-validated” for easy deployment. The QUB initiative underscored QuantWare’s roadmap ethos: instead of isolated breakthroughs, build an ecosystem (chips + controls + software) that can together deliver “quantum utility” as soon as possible.

Future Roadmap: QuantWare’s bold goal is to enter the “KiloQubit” era by 2028, delivering the first 10,000-qubit single-chip quantum processors to customers. From there, the company aims to scale to hundreds of thousands or a million qubits in the early 2030s – the scale believed necessary for fault-tolerant quantum computing. Achieving this will require continued annual doubling (or more) of qubit counts, something QuantWare believes is feasible with its 3D VIO architecture as long as control and fabrication technology keep pace. The upcoming KiloFab (operational in 2026) will play a critical role in hitting these targets, as it allows QuantWare to fabricate complex multi-layer chips in-house and in volume. Overall, the roadmap envisions QuantWare enabling a transition from today’s noisy intermediate-scale quantum (NISQ) devices to “utility-scale” quantum computers within the next 5-8 years – a trajectory that, if realized, would accelerate the timeline for quantum advantage and beyond.

Focus on Fault Tolerance

Achieving fault-tolerant quantum computing – where errors are corrected faster than they accumulate – is a core focus of QuantWare’s strategy. The company recognizes that quantum error correction (QEC) is the essential step to unlock useful, large-scale quantum machines. To this end, QuantWare has tailored its hardware designs and partnerships toward facilitating error correction:

Path to Fault-Tolerant Scale: Ultimately, QuantWare’s focus on fault tolerance is evident in its end goal: enabling utility-scale and fault-tolerant quantum computers as soon as possible. The company frequently states that mastering QEC is “the key to unlocking fault-tolerant quantum systems that massively expand the application space of quantum computers.” All of its major R&D directions – scaling up qubit counts, improving qubit connectivity and coherence, and collaborating on control automation – feed into the objective of demonstrating a logical (error-corrected) qubit and then scaling up logical qubit counts. By first providing hardware for QEC research (like Contralto-A) and next planning a 10k-qubit architecture that could host many logical qubits, QuantWare is deliberately stepping toward a fault-tolerant architecture. Significant challenges remain (discussed below), but the company’s trajectory aligns with enabling error-corrected quantum computing in the coming decade. In summary, QuantWare has baked fault tolerance into its roadmap, ensuring that increasing qubit quantity goes hand-in-hand with improving qubit quality, stability, and error correction capabilities.

QEC-Optimized Processors: QuantWare’s Contralto-A QPU is explicitly built for exploring advanced QEC protocols. With 17 qubits, Contralto-A provides the largest available platform for testing error-correcting codes like the surface code, which it can support at distance-3 (a small logical qubit protected by 17 physical qubits). The chip incorporates features specifically to improve error correction performance: each qubit is connected via flux-tunable couplers (allowing precise, low-noise two-qubit gates) and has dedicated Purcell filters to speed up readout while maintaining      coherence. This custom layout was co-designed with leading QEC experts so that researchers can run high-fidelity operations and syndrome measurements across the chip – effectively a testbed for demonstrating rudimentary fault tolerance in hardware. The approach earned praise from industry observers; a jury of the Quantum Effects conference noted that Contralto-A’s architecture “enables practical surface code implementations and forms an important building block for fault-tolerant quantum computers”. By making such a platform commercially accessible (Contralto-A began early access in late 2025, with general release slated for 2026), QuantWare is accelerating the community’s ability to practice and refine error-correction techniques on real superconducting quantum hardware.

Vertical Integration for QEC: QuantWare’s VIO architecture is not only about scaling qubit count, but also about integrating the control infrastructure in a way that supports error correction. VIO embeds control and readout wiring through the depth of the chip stack, which reduces noise and signal delays for large systems. By delivering control signals in 3D, VIO can mitigate the crowding and cross-talk that would plague a large 2D chip, thereby preserving qubit fidelity even as the system grows. This is crucial for QEC, because maintaining error rates below threshold (e.g. <1% two-qubit error) across thousands of qubits is a prerequisite for any fault-tolerant machine. QuantWare’s engineering focus – tackling wiring, I/O, and packaging challenges – addresses the often overlooked error sources that come with scale. In essence, the company is ensuring that when error-correcting codes are deployed on a 1000+ qubit system, the hardware infrastructure itself will not be the limiting factor.

Partnerships for Error Mitigation: Recognizing that fault tolerance is a full-stack challenge, QuantWare has partnered with specialized quantum software and control firms. The Quantum Utility Block (QUB) alliance with Qblox and Q-CTRL is a prime example. Q-CTRL provides infrastructure software (like autonomous calibration and error-suppressing control algorithms) that sits on top of QuantWare’s QPUs. Their tools (Fire Opal, Boulder Opal) can reduce noise and automatically stabilize qubits, effectively boosting coherence and gate fidelity in real time. By bundling this with QuantWare hardware in QUB, the companies offer a pre-calibrated system where error mitigation techniques are “baked in.” This will help users run longer circuits on QuantWare processors with fewer errors, serving as a bridge to the true error-corrected era. Additionally, QuantWare’s hardware is open-architecture, meaning it can interface with other vendors’ components – for example, using NVIDIA’s NVQLink and CUDA-Q platform to offload heavy classical processing like decoding error syndromes. Such hybrid setups (quantum chips tightly integrated with classical GPUs/FPGAs for feedback) are likely to be essential in running real-time error correction on large qubit arrays. QuantWare’s embrace of open standards (they invite others to adopt VIO and QOA – Quantum Open Architecture) suggests an ecosystem approach to fault tolerance: the best qubits, best controls, and best error-correction software combined.

CRQC Implications

A cryptographically relevant quantum computer (CRQC) is commonly defined as a quantum machine capable of breaking strong public-key cryptography (like RSA-2048) in a reasonable time. In practice, this means running Shor’s algorithm on a large enough fault-tolerant quantum computer to factor 2048-bit RSA keys. Experts estimate that on the order of a million high-fidelity physical qubits (with error correction) might be required to factor RSA-2048 in under a few days. With this context, it’s clear that QuantWare’s latest announcements – while groundbreaking for hardware scaling – do not immediately herald the arrival of Q-Day (the day quantum computers can break our cryptography) just yet. Even a 10,000-qubit device, if it is comprised of noisy physical qubits, falls far short of the several thousand logical qubits needed for a CRQC.

QuantWare’s 10,000-qubit architecture in perspective: The company’s VIO-40K announcement is undoubtedly a leap in capacity – a two orders of magnitude jump beyond the ~100-qubit range that has been the norm. However, as analysts have noted, “a 10k physical qubit device with standard ~1% two-qubit error rates is not breaking any encryption; it’s just a bigger noisy device.” On its own, more qubits do not equal cryptographic threat. To impact CRQC timelines, those qubits must also be accompanied by error rates below the threshold for error correction (perhaps ~0.1% or better), a functioning error-correction scheme deployed across them, real-time decoding of errors, and the ability to run sustained calculations without failure. In other words, we’d need to see QuantWare’s large processor not just exist, but also operate as a stable, error-corrected system, to consider it a cryptographically relevant machine. By QuantWare’s own admission, the 10k-qubit milestone is about solving an engineering scalability bottleneck, not about immediately cracking RSA. The company explicitly tempered expectations that Q-Day is not here yet just because of a big qubit number.

Long-term impact on quantum risk: While 10,000 noisy qubits can’t break modern cryptography, the significance of QuantWare’s achievement is that it does remove a key roadblock on the path to those cryptanalysis-capable machines. Previously, one might worry that even if we had quantum algorithms and error correction figured out, the hardware couldn’t scale to the required size due to wiring and packaging constraints. QuantWare showed a plausible solution to that scaling problem. By fast-forwarding the hardware scaling, QuantWare potentially brings forward the dates at which certain crucial milestones can be hit – for example, demonstrating a logical qubit, or a small error-corrected algorithm on a sizable qubit array. In essence, if their 3D chip architecture works as advertised, the community could accelerate experiments on larger quantum processors, which in turn accelerates learning and progress toward a CRQC. One analyst compared it to supercomputing: it’s not just about the “CPU” (qubit) quality, but also about architectures that let thousands of CPUs work together – QuantWare is tackling those “boring but necessary” engineering aspects now.

Therefore, the implications for CRQC are twofold:

1. No immediate threat change: QuantWare’s advancements do not shorten the cryptographic threat timeline in the present moment. Security experts aren’t rushing to change their estimates for when encryption might be broken, because we still need that million-qubit, low-error quantum computer which is not imminent. Even after QuantWare ships a 10k-qubit chip (expected ~2028), substantial additional progress (in qubit fidelity, error correction, etc.) will be required before such hardware can factor RSA. It’s a reminder that qubit count alone is an incomplete metric for CRQC; quality and fault tolerance matter enormously.
2. Heightened urgency to prepare: At the same time, QuantWare’s leap is a strong signal that the industry is systematically overcoming obstacles on the way to large-scale quantum computing. It reinforces that a CRQC is a matter of “when, not if,” and perhaps the “when” could be pulled in if parallel progress continues. For organizations planning cybersecurity, this serves as a wake-up call: quantum hardware progress can be non-linear. A 100× increase in qubits (QuantWare’s 100 → 10,000 jump) demonstrates how quickly the landscape can advance when a breakthrough occurs. It underscores the importance of transitioning to post-quantum cryptography well before a CRQC arrives, because the lead time might be less than anticipated if multiple scaling breakthroughs (engineering, error correction, etc.) compound. In summary, QuantWare’s work does not mean RSA will be broken tomorrow, but it does validate that the road to a CRQC is being actively paved. The announcement “increases the plausibility and maybe the speed of reaching the next scaling milestones”, like demonstrating truly error-corrected qubits, which are precursors to a full CRQC.

From a risk perspective: security professionals view this as positive engineering progress that might accelerate the eventual advent of CRQCs, but not a reason to panic about an imminent quantum crypto-breaker. In practical terms, the community will be watching for QuantWare (and others) to follow up this big-qubit hardware with evidence of low error rates at scale, logical qubit performance, and stable operation – the real indicators that would signal a true shift in the CRQC timeline.

Modality & Strengths/Trade-offs

QuantWare’s technology modality is superconducting qubits – specifically, variants of the transmon qubit implemented in superconducting circuits. This is the same dominant approach used by industry leaders like IBM, Google, and Rigetti, and it’s considered the “leading and most mature approach” to quantum processors today. Superconducting qubits are fabricated on silicon or sapphire chips using Josephson junctions, and they operate at microwave frequencies, requiring dilution refrigerators to cool them to ~10 millikelvin. QuantWare’s choice to build on superconducting qubits comes with a distinct set of strengths and trade-offs:

Strengths of QuantWare’s Superconducting Modality:

• Technological Maturity and Performance: Decades of R&D have made superconducting qubits one of the best-understood modalities. They have demonstrated high-fidelity operations (single- and two-qubit gate fidelities above 99% in labs) and fast gate speeds (tens of nanoseconds per gate). QuantWare leverages this maturity – for instance, its 5-qubit Soprano chip could achieve ~99.9% fidelity per qubit from the outset. The maturity also means a robust supplier ecosystem (cryostats, control electronics, etc.) exists, which QuantWare taps into to deliver complete solutions. Matt Rijlaarsdam, QuantWare’s CEO, noted that superconducting qubits are highly customizable, relatively easy to control, and very scalable, making them a practical choice for near-term applications. This is evidenced by Google’s quantum supremacy result in 2019 using 53 superconducting qubits – a proof that this modality can perform complex computations beyond classical reach.
• 3D QPU      Architecture (VIO) – Scalability Advantage: A unique strength QuantWare adds is its VIO 3D integration. Traditional superconducting chips are 2D, which runs into severe layout problems beyond ~100 qubits (most of the chip area gets consumed by control wiring, not qubits). QuantWare’s VIO approach re-architects the chip in three dimensions: control and readout lines are delivered vertically through stacked chiplets, freeing up planar area for qubits. This dramatically reduces the “fan-out” wiring explosion and allows many more qubits to be densely packed without loss of signal fidelity. Additionally, by eliminating the need for hundreds of edge connectors, multiple quantum chiplets can be tiled into one larger virtual processor with direct chip-to-chip quantum connections. The strength here is clear: QuantWare can scale qubit counts by nearly two orders of magnitude on a single module while keeping the architecture monolithic from the qubits’ perspective. Instead of needing a network of many small quantum processors (which introduces latency and complexity), QuantWare proposes one big processor in one fridge. This is potentially simpler to control and more cost-effective per qubit (one large cryostat vs. many). In practical terms, if VIO works as intended, QuantWare’s superconducting modality might achieve scale and integration levels that others require entire modular networks to get to. The ability to have 10,000 qubits in one cryogenic chamber is a major competitive strength for tackling certain problems (e.g. error-correcting a single huge quantum circuit without dividing it across separate modules).
• Customization and Openness: Unlike some full-stack quantum providers, QuantWare’s business is to supply components, which incentivizes them to make their hardware flexible. They allow custom specifications – for example, buyers of Contralto could request different qubit frequencies, coupler configurations, or additional on-chip features. This is a strength for research customers who might want to experiment with novel qubit designs or couplings. Moreover, QuantWare’s commitment to an open architecture means their superconducting QPUs can interface with a variety of control systems (Qblox, Quantum Machines, etc.) and software stacks. This contrasts with more siloed approaches where one company’s qubits only work with its proprietary control electronics. The open, modular philosophy lowers integration risk and allows end-users to mix-and-match the best components (which QuantWare actively encourages). It also helped QuantWare form partnerships (NVIDIA for classical integration, Qblox/Q-CTRL for QUB, etc.) that enhance the overall capability of its modality beyond the raw qubits alone.
• Cost and Time Efficiency: A practical strength of QuantWare’s offering is cost-effectiveness. By specializing in making QPUs at scale, they claim to reduce the cost of building a quantum computer by up to 10× compared to vertically integrated efforts. For example, instead of an organization spending tens of millions to develop a chip in-house, they can buy a Contralto for a fraction of that and focus resources elsewhere. QuantWare has also demonstrated quick turnaround – delivering a custom 25-qubit chip in 30 days. This efficiency in both time and money expands the pool of players who can afford to experiment with quantum computing hardware, which in turn can drive innovation and adoption. Essentially, superconducting qubits via QuantWare become a commodity component, not a multi-year, multimillion bespoke project. This is a novel strength in the industry, and if QuantWare continues to scale manufacturing (with KiloFab) it could further drive down cost per qubit, analogous to how classical chip foundries enabled cheaper CPUs over time.

Trade-offs and Challenges of the Modality:

• Cryogenic Overhead: Superconducting qubits must operate at extremely low temperatures (~0.01 K). This means any quantum computer using QuantWare’s chips requires a dilution refrigerator and significant cryogenic infrastructure. As qubit counts grow, the heat load from thousands of control lines and amplifiers grows as well, potentially straining the limits of cryo-cooling. QuantWare’s VIO architecture is partly meant to address this (by optimizing heat transfer and reducing the number of separate fridge systems needed). Still, a 10,000-qubit fridge is uncharted territory – it concentrates a lot of complexity in one physical unit. Competing approaches like distributed modules might avoid a single point of failure, whereas QuantWare’s monolithic approach will need extremely robust cryogenics. In short, the reliance on dilution refrigerators remains a fundamental trade-off: superconducting qubit systems have high operational complexity and power costs (for cooling), unlike some room-temperature modalities. QuantWare is mitigating this by clever engineering, but the physics constraint remains.
• Coherence vs. Scale: Superconducting qubits have relatively short coherence times (typically 50-200 microseconds T1/T2 for state-of-the-art devices). As QuantWare scales up, ensuring each of the thousands of qubits maintains long enough coherence and low error rates is challenging. More qubits and more interconnects can introduce more noise sources (materials defects, cross-talk, etc.). QuantWare’s use of features like Purcell filters and clean fabrication is aimed at maximizing coherence, but as they push to chip sizes much larger than anyone has built, there is a risk of unpredictable error sources creeping in. This is a trade-off: scale can come at the expense of quality. The company will need to continually improve fabrication processes (hence investing in their own fab) to keep qubit quality high even as circuit complexity increases. Other modalities, like trapped ions, have much longer coherence intrinsically (seconds), though at the cost of slower gates. QuantWare is betting that fast superconducting gates plus error correction can compensate for moderate coherence, but it’s a race between improving qubit fidelity and increasing qubit count.
• Control Complexity: Operating even a 100-qubit superconducting processor already requires a dense stack of control hardware (MW generators, AWGs, FPGAs, etc.). A 10k-qubit device implies an enormous classical control burden: tens of thousands of microwave control lines and readout channels, all needing calibration. QuantWare’s modality trade-off is that while they eliminate some wiring via 3D integration, they still output to 40,000 I/O connections that must be managed. The sheer complexity of controlling and calibrating so many channels is daunting. There’s a trade-off between openness and integration here: because QuantWare doesn’t build its own control electronics (it partners with firms like Qblox), it relies on the broader ecosystem to tackle this control challenge. If that ecosystem (say, classical electronics or automation software) lags behind the qubit scaling, the full performance of the chip might not be realized. QuantWare is addressing this by collaboration – e.g. ensuring Qblox control racks and Q-CTRL software can automate much of the calibration for large QPU arrays. Nonetheless, the risk remains that managing a 10k-qubit superconducting system could be unwieldy. This is a known issue for superconducting modality in general: management overhead scales sharply with qubit count. QuantWare’s approach concentrates that overhead into one system; competitors might distribute it across multiple smaller systems.
• Competition and Differentiation: Superconducting quantum computing is a crowded field, with giants like IBM, Google, and Intel pursuing it. QuantWare’s strength is their niche focus (supplying hardware to others), but a trade-off is that they don’t own the full stack or end-user platform. For example, IBM’s superconducting roadmap might achieve a fault-tolerant 1000+ qubit system by the late 2020s with their own modular approach. If IBM (or others) reach similar qubit counts with better coherence through different means, QuantWare will need to demonstrate that its way (monolithic 3D chips) is superior or more cost-effective. In other words, superconducting qubits will likely succeed at large scale – but will customers want to buy chips from QuantWare or use full-stack offerings from bigger providers? QuantWare’s bet is that many organizations will prefer an open architecture and avoid vendor lock-in. This is arguably a strength of their model, but it’s also a risk if, say, IBM’s technology becomes standard. Essentially, QuantWare must compete on qubit performance and price in the same modality that big players are investing heavily in. Their differentiation hinges on execution of VIO and the open-supply model.

In summary, QuantWare’s modality choice of superconducting qubits with a novel 3D twist gives it a powerful combination of proven qubit tech and cutting-edge engineering for scalability. The strength lies in using known-good qubits and pushing them to new heights in quantity, while the trade-offs involve managing the complexity and cryogenics that come with that push. If QuantWare can successfully navigate those trade-offs (through engineering and ecosystem partnerships), it stands to deliver superconducting quantum processors of unprecedented scale much sooner than most believed possible – an outcome with industry-wide ramifications.

Track Record

Although QuantWare is a young company (founded in 2021), its track record to date shows a pattern of setting bold hardware goals and consistently meeting them – often faster than the industry expected. This execution has earned QuantWare a high degree of credibility in the quantum technology space:

• Technical Milestones Delivered: QuantWare has a history of announcing ambitious technical targets and following through. It claimed the first “off-the-shelf” superconducting processor and delivered Soprano (5 qubits) in 2021. It promised a larger, customizable chip and shipped Contralto (25 qubits) by early 2022. It set out to build a 64-qubit device (Tenor) using new architecture by 2023, and indeed by      2025      the Tenor QPU was operational and later revealed to be powering Italy’s largest quantum computing initiative. Each step – 5 to 25 to 64 qubits – was achieved roughly within the aggressive timeline the company laid out, demonstrating that QuantWare can execute on R&D and manufacturing goals rapidly. This lends weight to their future claims (such as reaching 1024 qubits and beyond) since they have shown a pattern of exceeding prior qubit-count plateaus.
• Pioneering the Open Supply Chain Model: QuantWare’s track record is intertwined with proving the viability of an open-hardware ecosystem for quantum computers. A signature achievement was the ImpaQT project in 2021, the world’s first multi-company quantum computer, for which QuantWare supplied the QPU. This project in the Netherlands successfully integrated components from different startups into one working quantum system, validating QuantWare’s vision that collaboration can outpace an isolated approach. Subsequently, QuantWare’s processors became the brains of several milestone machines: Israel’s first quantum computer (2022), Spain’s first quantum computer (2023), and at least one of Italy’s first quantum computing platforms (2025). In each case, the “first” in a country using QuantWare hardware is a strong endorsement of its technology. It means national programs and leading research consortia trusted QuantWare to deliver the core of their quantum system. Having its chips in multiple countries’ flagship projects by 2025 is a remarkable track record for a startup, effectively making QuantWare a globally recognized name in quantum hardware supply.
• Volume Supplier and Global Adoption: QuantWare likes to say it is “the backbone of the global quantum supply chain,” and there is substance behind that claim. The company has customers in over 20 countries already, spanning North America, Europe, and Asia. It also notes that it has “powered the first quantum computer in over 5 major economies,” underscoring how widely its impact has spread in a short time. QuantWare is today considered the highest-volume producer of quantum processors in the world, meaning they fabricate and ship more QPUs (in terms of unit count) than perhaps any other single quantum hardware player. This volume is still small in absolute terms (quantum is not at the scale of classical chip industry), but relative to peers (many of whom deliver only to internal projects or a few cloud clients), QuantWare has achieved a breadth of deployment that is unmatched. This broad adoption serves as a track record of reliability: their chips work in a variety of setups, environments, and use cases, not just a controlled internal setting.
• Fundraising and Recognition: On the corporate side, QuantWare has rapidly gained credibility with investors and industry watchers. The company raised a seed round of €6M in 2023 and a Series A of $27M in mid-2025 – sizable sums for a hardware-focused quantum startup – indicating that it hit the technical and commercial milestones needed to unlock funding. The Series A was led by respected deep-tech investors and even included the NATO Innovation Fund, a sign that governments see strategic value in QuantWare’s tech. In terms of accolades, QuantWare won the Deloitte Technology Fast 50 “Rising Star” award in 2024 and the Quantum Effects hardware award in 2025, both recognizing the company’s impact and growth. Furthermore, QuantWare’s leadership and team come from top institutions (the CTO was a senior researcher in a renowned QuTech lab). This background gave them instant credibility in the eyes of the quantum community. The fact that in late 2025, Aparna Prabhakar (former IBM Quantum VP) joined QuantWare’s Board also speaks to its growing reputation; attracting such talent suggests confidence in QuantWare’s direction.
• Partner Ecosystem and Market Traction: QuantWare has built a strong partner network, which is a track record of trust in itself. It collaborates with specialized companies like Qblox (for control hardware), FormFactor (for cryogenic systems), Tabor Electronics (for waveform generators), Q-CTRL (for software), etc. Notably, in 2024 a consortium including QuantWare delivered a full 5-qubit turnkey quantum computer (the “Echo-5Q”) for under $1M, integrating a QuantWare chip with FormFactor’s cryostat and Tabor’s controls. This showed that even small-scale but complete quantum computers can be built and sold using QuantWare’s processor as a component. Commercial traction is further evidenced by repeat customers and orders for its next-gen devices (e.g., multiple orders for Contralto-A from research labs working on QEC). QuantWare’s open approach has allowed it to slot into many projects, effectively de-risking those projects’ hardware development. That reputation – as a dependable provider of the “quantum CPU” – strengthens with each successful integration.

In summary, QuantWare’s track record can be characterized by rapid progress and growing influence. In just a few years, it went from a two-person academic spin-out to a company enabling quantum computing efforts on three continents. It has delivered on its promises (often ahead of schedule), earned the trust of both customers and investors, and set several “firsts” in the industry. There is of course a long road ahead to reach the full promise of its roadmap, but so far QuantWare has proven to be a serious and credible player, validating the notion that a startup can carve out a pivotal role in the quantum hardware landscape.

Challenges

Despite its impressive momentum, QuantWare faces formidable challenges on the road to building large-scale, fault-tolerant quantum processors. Some key challenges and risks include:

• Achieving Fault-Tolerance in Practice: The leap from tens of qubits to a cryptography-breaking, fault-tolerant quantum computer is immense. QuantWare’s plans must confront the quantum error correction challenge head-on. This means drastically improving qubit error rates and implementing error correction across thousands or millions of qubits. Today, two-qubit gate errors in superconducting systems are on the order of 1%, whereas error-corrected operation may require ~0.1% or better. Simply put, if a 10,000-qubit device still has 1% error rates, it remains a noisy intermediate-scale machine, not a fault-tolerant one. QuantWare will need to demonstrate that adding qubits (via its VIO architecture) doesn’t introduce unmanageable new errors and that those qubits can be kept “in line” with coherence long enough to perform QEC cycles. Developing a scalable error correction scheme is also non-trivial; even though Contralto-A supports a small surface code, going from there to a full logical qubit with, say, 1000+ physical qubits will require significant advances in real-time feedback, syndrome extraction, and decoder algorithms. In essence, one major challenge is that QuantWare’s hardware scaling must be matched by equally successful error correction scaling – a synchronization of progress that has yet to be demonstrated industry-wide.
• Validation of the 3D Scaling Architecture: QuantWare’s bold VIO-40K approach is so far supported by simulations and engineering arguments, but it remains unproven at scale. Manufacturing a 3D chip stack with perhaps dozens of qubit chiplets and thousands of through-silicon vias is very complex. There is risk in yield (will all those chiplets and vertical interconnects work uniformly without introducing loss?) and risk in performance (are “ultra-high-fidelity” chip-to-chip couplings truly as good as on-chip couplings?). If the inter-chip connections have even slightly lower fidelity or higher latency, they could become a weak link that limits the entire processor’s reliability. Additionally, packing 10k qubits in one system brings thermal and crosstalk challenges that have never been seen before – e.g., crosstalk between stacked layers, or heat dissipation from 40k control lines in one cryostat. QuantWare will be breaking new ground in cryogenic packaging; any unexpected physical effects at this scale could delay or derail the performance targets. Essentially, scaling from 64 qubits to 10,000 in one jump is an enormous engineering challenge, and while the theory is sound, the execution may reveal unforeseen obstacles. The company’s timeline (deliver in 2028) leaves only a few years to prototype, test, and refine this architecture, which is extremely tight for hardware of this complexity.
• Control Systems and Automation: Controlling a handful of qubits is an art; controlling thousands is a science experiment in itself. One of QuantWare’s challenges will be to ensure that the classical control infrastructure (electronics and software) can handle the 40,000 I/O lines and thousands of analog waveforms that a 10k-qubit processor entails. Calibration routines that take hours for 50 qubits would be infeasible for 5000 qubits unless there’s major automation. Qubits can drift or cross-couple, requiring continual tuning of frequencies and pulse parameters. QuantWare’s partnership strategy (with Qblox, Q-CTRL, etc.) acknowledges this, but delivering an integrated system where calibration and error mitigation are largely automated is still a work in progress for the industry. As an example, by 2027-2028 we would hope to see a smaller VIO-based system (say a few hundred qubits) running stably for hours with autonomous calibration to gain confidence that a 10k-qubit machine is manageable. If automation falls short, users might find a 10k-qubit QPU practically unusable due to the overhead of keeping it tuned. In summary, the complexity of orchestration is a huge challenge: QuantWare must effectively bring supercomputing-like orchestration to the quantum realm, ensuring that thousands of qubits plus classical controllers operate in concert as a reliable machine.
• Fabrication and Supply Chain Scale-Up: To meet its roadmap, QuantWare is building KiloFab, a dedicated fabrication line for quantum chips. This is a major endeavor – moving from using shared cleanroom facilities to running a specialized fab. Challenges here include acquiring and tuning equipment for exotic processes (Josephson junction fabrication, through-silicon via etching, etc.), achieving high yield on multi-layer quantum devices, and doing all this cost-effectively. The Series A funding will help, but building a fab often runs into delays and cost overruns. There’s also a talent challenge: competing with large semiconductor firms for skilled nanofabrication engineers. Until KiloFab is operational and producing at scale, there’s execution risk in QuantWare’s supply chain. If delays occur, QuantWare might struggle to deliver on orders (for example, if multiple customers reserve 10k-qubit chips in 2028, can they produce enough?). Meeting 20× production increase by 2026 is an extremely aggressive target. Any slip could push back the 10k-qubit timeline and give competitors a chance to catch up or surpass.
• Competition and Market Adoption: On the market side, QuantWare operates in a competitive and fast-evolving landscape. Tech giants like IBM have publicly announced their own roadmaps to large-scale quantum computers by 2029, including modular and 3D integration strategies. Startups like PsiQuantum (photonic qubits) and others are pursuing million-qubit visions with very different technologies. QuantWare must maintain a pace of innovation to stay competitive with these well-funded efforts. Moreover, as a component supplier, QuantWare’s success depends on a robust market of quantum system builders (the companies/institutions that want to be “the Dell of quantum” as per QuantWare’s analogy). If many end-users instead opt for cloud access to big providers’ quantum computers, the demand for standalone QPUs might be limited. In essence, QuantWare is betting on a decentralized model of quantum development (many groups building their own machines). This market is still in its infancy. There is a risk that if quantum computing progresses slower than expected (or if only a few big players dominate), QuantWare could face a smaller customer base than its production capacity. The company will need to continuously demonstrate that working with an open-hardware supplier yields better ROI than going with a closed cloud service, to ensure sustained demand.
• Maintaining Quality at Scale: As QuantWare’s business scales, maintaining quality control is a constant challenge. Every additional qubit and every new design feature introduces potential points of failure. Superconducting qubits are sensitive to materials and fabrication inconsistencies (e.g., microscopic two-level system defects can kill coherence). Ensuring uniform performance across a 10k-qubit chip is a monumental task – even today, the best 100-qubit chips have variation in qubit quality across the die. QuantWare will have to invest heavily in R&D for materials science, fab process optimization, and testing to drive down variability. This includes possibly novel chip-level redundancy or repair strategies if some qubits in a huge array are bad. It’s analogous to challenges in classical chips where large dies suffer lower yields – except here a single “bad qubit” could impact a whole algorithm if not accounted for. The challenge is to deliver not just quantity, but reliable quantity – thousands of qubits that all meet the specs for error rates and coherence. This will likely require innovation in chip characterization and perhaps machine-learning-driven calibration to eke out the best performance from each qubit.

In conclusion, QuantWare’s journey toward ultra-scale quantum processors is fraught with challenges spanning physics, engineering, and market dynamics. The next few years will test whether the company can convert its innovative concepts into operational reality. Overcoming the wiring and packaging hurdle (with VIO) is only part of the puzzle; they must simultaneously ensure the whole system works as a coherent, controllable, fault-tolerant computer. The upside is enormous if they succeed – potentially leapfrogging the quantum field into a new era. But the risks are commensurate: any one of these challenges (be it qubit fidelity, fabrication scale, or control complexity) could significantly slow their progress. QuantWare will need to execute nearly flawlessly and continue its collaborative approach to tackle problems on all fronts.