Diraq

(This profile is one entry in my 2025 series on quantum hardware roadmaps and CRQC risk. For the cross‑vendor overview, filters, and links to all companies, see Quantum Hardware Companies and Roadmaps Comparison 2025.)

Introduction

Diraq is an Australian quantum computing startup (founded in 2022 as a spin-off from UNSW Sydney by Professor Andrew Dzurak) focused on building large-scale quantum processors based on silicon-based spin qubits. The company’s strategy is to leverage standard silicon CMOS manufacturing – using modified transistor structures that act as quantum bits – to achieve practical and scalable quantum computing. Diraq’s qubits are single-electron spins confined in silicon quantum dots, an approach originally pioneered by its founding team (Dzurak’s group demonstrated the first two-qubit logic gate in silicon in 2015). By consolidating millions of these qubits on a single chip, Diraq aims to deliver “utility-scale” quantum processors that are powerful and cost-effective enough for real-world applications. This vision of integrating quantum devices with classical semiconductor technology underpins Diraq’s mission to build fault-tolerant quantum computers using familiar silicon chip fabrication techniques. Notably, Diraq emerged as a separate venture from the earlier UNSW effort Silicon Quantum Computing (led by Michelle Simmons), choosing in 2022 to pursue a different route to the quantum computer “holy grail” by using standard CMOS-compatible chips rather than atomically placed donor qubits.

Milestones & Roadmap

Diraq has articulated a clear multi-phase roadmap for its technology over the next decade.

Phase 1 centers on developing in-house fabrication capabilities and early prototypes, including a 9-qubit silicon logic processor and the first quantum chips produced in commercial foundries.

In Phase 2, Diraq plans to transition from physical to logical qubits, demonstrating a logical (error-corrected) qubit in silicon and scaling up to a chip with on the order of 1,000+ physical qubits integrated with cryogenic control electronics.

Phase 3 envisions a fully fault-tolerant system capable of running useful algorithms, with 1 million+ qubits on a single chip and multiple logical qubits executing commercially valuable tasks. This roadmap aligns with the company’s timeline of delivering its first quantum computing product by around 2029 and a commercially useful fault-tolerant quantum computer by ~2033. It also reflects Diraq’s recognition that billions of physical qubits may ultimately be required for practical applications, given the overhead of error correction.

Alongside these long-term plans, Diraq’s R&D progress is marked by several significant milestones. By 2024 the team achieved consistent two-qubit gate fidelities above 99% in a silicon MOS quantum-dot device – representing the first silicon-CMOS platform to cross the ~99% fidelity threshold, a crucial benchmark for error correction. In fact, the $$CZ$$-gate fidelity reached ~99.5% in these experiments, indicating that silicon spin qubits can attain error rates at or below the commonly cited surface-code threshold.

Another milestone was demonstrating quantum operation at elevated temperatures: in a 2024 Nature study, Diraq (with UNSW collaborators) showed that spin qubits could be operated above 1 kelvin with fidelities in the fault-tolerance range (single-qubit Clifford gates up to 99.85% and two-qubit gates ~98.9%). This result relaxes the extreme cryogenic requirement and suggests that future silicon qubit arrays might run in higher-temperature cryostats with greater cooling power. In mid-2024, Diraq – in partnership with Professor David Reilly’s team (Emergence Quantum at University of Sydney) – announced a breakthrough in integrating classical control electronics at millikelvin temperatures. They demonstrated a cryo-CMOS driver chip operating alongside Diraq’s qubit chip in the dilution refrigerator, with no observable degradation of qubit performances.

Diraq’s progress and ambition have attracted international attention and support. In April 2025, Diraq was selected for DARPA’s Quantum Benchmarking Initiative (QBI), receiving a Stage A contract to validate whether its silicon-spin approach could achieve “utility-scale” quantum computing by 2033. Under QBI, Diraq leads a consortium spanning Australia, the UK, and the US, including partners like Emergence (for cryogenic architecture) and Riverlane (for quantum error correction), to accelerate its hardware roadmap. Participation in this U.S. Department of Defense program both funds and pressure-tests Diraq’s claims of scalability and has led the company to establish a presence in North America. For example, Diraq has signed on to join the new Illinois Quantum and Microelectronics Park, indicating plans to collaborate with U.S. national labs (like Fermilab) and tap into state-backed initiatives for quantum technology. On the home front, Diraq’s innovation was recognized with the 2025 Australian NSW iAward for Technology Platform, reflecting industry appreciation for its approach to “delivering utility-scale quantum computing using standard silicon chip manufacturing“.

Focus on Fault Tolerance

From the outset, Diraq’s strategy has centered on achieving fault-tolerant quantum computing through error correction. In practice, this means using a two-dimensional array of silicon spin qubits to implement a quantum error-correcting code (most likely the surface code) that can detect and correct errors faster than they occur. Diraq’s technical milestones have been geared toward meeting the stringent fidelity and uniformity requirements of such codes. Notably, the company’s recent two-qubit gate fidelity (>99%) crosses the rough threshold required for surface-code error correction. Researchers in Diraq’s team have reported single- and two-qubit operation fidelities “in the range required for fault-tolerant operations” even at elevated temperatures (1.1 K), highlighting the intrinsic quality of the silicon qubits. Achieving this consistency and high fidelity is essential because surface codes typically require error rates on the order of 1% or lower. In fact, Diraq’s 99% two-qubit gate benchmark was heralded internally as a “significant milestone” that “underpins…scaling up our silicon spin-based qubits into full-scale fault tolerant quantum processors”. The focus now is to push fidelities even higher (toward 99.9% range) and to maintain those error rates across many qubits simultaneously, so that logical qubits (made of dozens or hundreds of physical qubits) can reliably outperform physical ones.

Diraq has publicly indicated it will employ quantum error correction (QEC) techniques such as the surface code to reach logical qubits. Phase 2 of its roadmap explicitly targets demonstrating a logical qubit in silicon – i.e. a qubit encoded redundantly across an array of physical qubits. Achieving this will require not just high gate fidelities but also fast, parallelized readout and feedback. To that end, Diraq is collaborating with QEC-specialist company Riverlane to develop the real-time decoding and classical processing needed for error correction. Riverlane’s software and FPGA-based decoders are expected to help handle the torrent of syndrome data from Diraq’s qubit arrays and apply corrections on-the-fly. Additionally, Diraq’s consortium includes expertise in cryogenic readout and control (via Emergence Quantum) to ensure that the architecture for measuring error syndromes and controlling many qubits will scale. At present, Diraq has not announced a realized logical qubit or any large-scale QEC experiment on its hardware – its prototype devices are still at the few-qubit scale. However, the company’s steady improvement of qubit fidelity and stability, along with demonstrations like sustained two-qubit gate performance across multiple devices, are laying the groundwork for implementing error correction. The fault-tolerance goal is firmly in sight: Diraq’s CEO often reiterates that the aim is to “achieve a fully error-corrected quantum computing system” ahead of competitors, leveraging the low error rates and scalability of silicon. In summary, Diraq’s fault-tolerance strategy relies on combining high-quality physical qubits (high fidelities, long coherence), a robust QEC code (likely the surface code on a 2D grid of spins), and an integrated classical control stack to perform rapid error detection and correction. If these elements come together, Diraq expects to reach the logical qubit era in the second half of this decade, en route to a fault-tolerant quantum computer in the early 2030s.

CRQC Implications

A key question is whether Diraq’s approach, if successfully scaled, could support cryptographically relevant quantum computing (CRQC) – i.e. the ability to break current cryptographic codes like RSA or ECC. In principle, the answer is yes: Diraq’s end goal is a universal, fault-tolerant quantum computer with millions of qubits, which is the scale required to run algorithms like Shor’s factoring algorithm on RSA-sized integers. Industry estimates suggest that on the order of thousands of logical qubits are needed to factor a 2048-bit RSA key, which in turn could require millions of physical qubits (depending on error rates and code efficiency). Diraq’s roadmap of ~1 million physical qubits in a single chip by around 2033 is in line with these requirements. For example, if each logical qubit in a surface code requires ~1,000-5,000 physical qubits to achieve a very low logical error rate, a million-qubit processor could support dozens or even a few hundred logical qubits – enough to run certain cryptography-breaking algorithms (albeit with substantial runtime and circuit depth). Diraq itself acknowledges that useful quantum applications will need “billions of qubits” in total, accounting for the large overhead of quantum error correction. A machine at that scale would certainly qualify as CRQC-capable, able to execute computations beyond the reach of classical supercomputers, including those that undermine classical encryption schemes.

The timeline for CRQC is tightly coupled to Diraq’s progress. With a target of a fault-tolerant quantum computer by ~2033, Diraq implicitly places the potential for cryptographically relevant capabilities in the 2030s. If Diraq (or anyone) manages to build a fully error-corrected quantum system with ~10⁶ physical qubits and error rates around 10^-3 or better, then executing Shor’s algorithm on practical key sizes becomes feasible in polynomial time.

However, significant uncertainties remain in the timeframe and requirements: improved quantum algorithms or error-correction overhead reductions could lower the qubit count needed, or conversely, unexpected engineering challenges could mean more qubits or years are required. One can say that Diraq’s silicon-spin approach is among the contenders that could deliver a CRQC, given its emphasis on scalability. Silicon qubits have shown excellent coherence, and their small size means a million-qubit array is physically conceivable on a few centimeter-square chip (unlike, say, a million trapped ions or superconducting qubits, which would be much harder to house together).

Moreover, Diraq’s emphasis on energy efficiency and integration will matter for CRQC: a cryptographic task might require billions of quantum gate operations, so a design like Diraq’s that can run with minimal power and latency (due to on-chip control) offers an advantage in performing such a long computation. Assuming Diraq hits its performance targets, we can expect that by the time its first fault-tolerant processor comes online (early to mid-2030s), it would have the capability to attack some cryptographic problems within days or weeks of runtime – an ability that will raise significant security implications worldwide. In summary, Diraq’s scaled-up quantum computer would be a credible CRQC platform, but only if it achieves the necessary qubit count and error correction performance. The company’s aggressive roadmap suggests that they are consciously working toward that regime, and their involvement in programs like DARPA QBI (which explicitly seeks “utility-scale” quantum outcomes) underscores the national security interest in whether and when approaches like Diraq’s will cross the cryptographic threshold.

Modality & Strengths/Trade-offs

Diraq’s chosen modality – silicon spin qubits in CMOS-compatible quantum dot devices – comes with distinct advantages as well as engineering trade-offs when compared to other quantum computing approaches (superconducting circuits, trapped ions, photonics, etc.)

On the plus side, silicon spin qubits offer extraordinary scalability potential. Each qubit is essentially a modified transistor ~50 nm in size, and modern semiconductor processes can integrate billions of transistors on a chip. In theory, the same could be done for quantum dots, meaning Diraq’s platform can in the long term accommodate the huge qubit counts needed for useful quantum computers. This is a stark contrast to, for example, superconducting qubits, which are mesoscopic circuit elements (~mm-scale resonators and Josephson junctions) that occupy much larger area and are challenging to miniaturize further.

The use of standard CMOS fabrication is a major strength: Diraq’s qubits are manufactured using industry-standard techniques (implants, lithography, etc.), and the company has patented device designs that allow quantum dots to be created in silicon-on-insulator and conventional CMOS processes. Leveraging the semiconductor industry’s infrastructure means in principle faster progress, lower unit cost per qubit, and the ability to piggyback on decades of materials refinement. It also opens the door to monolithic integration of qubits and classical control logic. Diraq’s approach envisions that classical circuitry (for control and readout) can sit in the same cryogenic package – possibly even on the same chip – as the qubit arrays, something that is far more natural in silicon VLSI technology than in, say, superconducting or photonic platforms. A recent demonstration proved that a cryo-CMOS controller could drive spin qubits with negligible loss of fidelity, dissipating only on the order of 10 µW of power for the control chip in the process. This implies that a large-scale silicon quantum computer might be able to be operated with relatively low power consumption and heat load, an important consideration for practicality. Another advantage is the coherence and fidelity of silicon spins: in isotopically purified ^28Si, electron spins have shown impressively long coherence times (up to seconds in some cases with donors, and many milliseconds in quantum dots with echo techniques). Combined with the >99% gate fidelities demonstrated, this means each qubit is high-quality on its own. By contrast, other solid-state qubits like superconductors have shorter coherence (tens of microseconds) and require microwave pulses that can introduce cross-talk; ion trap qubits have superb coherence and fidelity as well, but operations are much slower (microsecond to millisecond gates) and harder to miniaturize. Silicon qubits also have the intriguing advantage of tolerating a bit higher temperature – experiments have operated them at 1-4 K with only modest fidelity loss, whereas superconducting qubits generally need ~20 mK and ion traps require laser cooling of ions to µK (though the trap apparatus can be at ~300 K). The ability to work at 1-4 K means simpler cryogenics (e.g. using pumped ^4He or closed-cycle cryocoolers), which could significantly reduce the infrastructure needed for a large quantum computer.

However, trade-offs and challenges exist for silicon spin qubits, reflecting the complexity of marrying quantum mechanics with nanoelectronics. One challenge is the need for ultra-low temperatures despite the above-mentioned progress – while operation at 1 K is feasible, true large-scale quantum processors will likely still require dilution refrigerators (sub-100 mK) to achieve the highest fidelities and longest coherence. Managing heat in a densely packed chip becomes non-trivial; even milliwatts of dissipation (from control electronics or just the cumulative effects of many qubits switching) could warm the device and spoil quantum coherence. Diraq’s approach of co-locating cryo-control is promising, but it imposes tight power budgets and careful thermal design.

Fabrication uniformity is another concern. In a classical computer chip with billions of transistors, slight variability is acceptable – circuits are designed with margins. In quantum dots, variations in gate voltage thresholds or dot size can mean one qubit’s resonant frequency or coupling strength is quite different from another’s. Tuning each qubit by adjusting gate voltages is possible (and routinely done in lab prototypes), but doing so for millions of qubits is a daunting task. This is where advanced process control and perhaps on-chip calibration networks will be needed. Diraq is addressing this by partnering with fabs (like GlobalFoundries) known for extremely uniform fabrication, and by developing auto-calibration techniques, but industrial yield of functional qubits at scale remains unproven. By contrast, ion traps have identical ions (removing fabrication variation) but at the cost of a complicated trapping apparatus; superconducting qubits also face yield issues as devices scale up (each SQUID can have slight disorder), so this is not unique to silicon – but it’s a critical factor.

Another trade-off involves the control architecture. Silicon spin qubits require carefully engineered control fields (magnetic or electric) to perform operations. In early devices, each qubit might have a dedicated microwave line for electron spin resonance (ESR) or a local magnet for electric dipole spin resonance. These approaches do not scale beyond maybe tens of qubits due to crowding and heating. Diraq and others have developed techniques like global control fields – applying one microwave field to the whole chip and using local electrostatic gating to select which qubit it affects. This drastically reduces wiring, but it adds complexity in qubit design (each qubit’s resonance must be tunable and well-separated). The intrinsic spin-orbit EDSR mechanism that Diraq discovered is another solution: by exploiting a spin-orbit interaction within the device, they can drive a qubit’s spin state with an oscillating electric field (no nearby antenna or magnet needed). This “all-electric” control is less bulky and easier to integrate – an example of innovating around the scaling challenges. Even so, delivering control pulses to (and reading signals from) millions of qubits demands an unprecedented level of engineering (imagine a classical chip with billions of I/O pins – quantum brings a similar complexity). Competing modalities face analogous issues: superconducting qubits need extensive microwave control lines and amplifiers (companies like IBM are developing cryo-multiplexers to handle this), and ion trap systems need many laser beams or modulators for control. In this regard, no approach has a simple scaling path, but Diraq’s bet is that because their qubits are like transistors, they can integrate control in a more streamlined way by borrowing silicon fabrication tricks (such as routing layers, on-chip filters, etc.).

When comparing strengths and weaknesses across modalities, a few key points emerge. Superconducting qubits (e.g. Google’s and IBM’s) currently lead in number of qubits demonstrated (tens to hundreds) and have fast gate speeds (~tens of nanoseconds), but they are large in size, power-hungry (requiring large dilution fridges), and face potentially difficult crosstalk and scaling issues beyond a few thousand qubits. Trapped-ion qubits have superb fidelity and full connectivity in small systems, which makes near-term demonstrations of error correction easier, but ion systems are slow and hard to integrate into a compact form (they might require an optical network between many ion traps to scale to millions of qubits). Photonic qubits (like those pursued by PsiQuantum) operate at room temperature and can leverage photolithography for certain components, but currently rely on probabilistic entanglement and would need enormous resource overhead (thousands of photons for one logical qubit, by some estimates) – though they offer potential integration with telecom fiber networks. In this landscape, silicon spin qubits stand out by offering a combination of solid-state integrability (like superconductors) and extreme miniaturization (approaching the scale of electronics). They do demand cryogenics and high precision fabrication, but they inherit a half-century of know-how from the silicon microelectronics industry, which is a powerful asset. Diraq often points out that today’s CMOS chips are arguably humanity’s most complex and precise technology – with billions of transistors orchestrated reliably – and argues that a quantum computer built with similar technology will be more likely to reach the qubit counts required.

In summary, Diraq’s silicon spin qubit modality offers clear strengths in scalability, manufacturability, and qubit fidelity, but it must navigate the trade-offs of low-temperature operation, device variability, and control complexity. The company’s recent breakthroughs (high-fidelity gates, higher-temp operation, integrated control) have chipped away at these challenges, giving confidence in the approach, but significant work remains to fully close the gap between a few-qubit prototype and a large-scale quantum processor.

Track Record

Diraq’s track record to date reflects a strong execution on both the scientific and commercial fronts, though the toughest steps still lie ahead. The company’s technological foundation is built on decades of research at UNSW. Notably, Professor Andrew Dzurak (Diraq’s CEO) led the team that demonstrated the first quantum logic gate in silicon in 2015 – a landmark achievement that proved two silicon spin qubits could be entangled and controlled as a universal quantum gate. This was followed by a series of advances throughout the late 2010s and early 2020s by Dzurak’s group and collaborators: they improved single-qubit fidelities to >99.9%, showed two-qubit logic above 98% by 2019-2021, and explored methods for scaling (such as global control and new readout techniques). By the time Diraq was spun out in 2022, it already had a “trove of proprietary technology” from UNSW’s Quantum Computing program and the Australian Centre of Excellence efforts. This deep scientific pedigree gave Diraq a head start with a library of patents and know-how (for example, on CMOS quantum dot designs, calibration algorithms, and quantum error correction methods tailored to spins).

Since its founding, Diraq has met or exceeded several of its interim technical goals. A year into operations, it announced the achievement of 99% two-qubit gate fidelities on its silicon CMOS platform (publicly detailed in Nature Physics 2024) – a result that garnered notice because it placed silicon spin qubits on a competitive footing with the best superconducting and ion-trap systems in terms of gate accuracy. In 2023-2024, the company also demonstrated new techniques (like the intrinsic spin-orbit control mechanism) to simplify qubit control, and published results on operating qubits at higher temperatures (1-4 K), which is important for integrating conventional electronics. Perhaps the most significant proof-point of Diraq’s execution is the mid-2025 Nature paper on milliKelvin control electronics co-developed with Emergence: this experiment addressed a long-standing scaling problem and did so in a system using Diraq’s own qubits. Each of these accomplishments corresponds to challenges listed on Diraq’s roadmap – high-fidelity gates, increased operating temperature, and integrated control – indicating that the company is methodically checking off critical milestones.

On the commercial side, Diraq has secured a strong base of financial and institutional support. It raised approximately AUD 63 million in 2022-2023 (seed and Series A rounds), backed by venture firms and funds such as Main Sequence Ventures, UNSW’s Uniseed, NewSouth Innovations, and the French quantum VC Quantonation. An extended Series A in late 2024 brought total funding to roughly AUD 78 million (USD 50 million), and in 2025 Diraq added further investment (including international investors from the US and Singapore) in a ~$15 million raise to support its expansion. This level of funding, while modest compared to some U.S. competitors, is one of the largest war chests for an Australian quantum startup. It has enabled Diraq to grow its team (hiring specialized engineers and physicists) and to establish operations abroad. In 2023-24, Diraq set up offices in the United States (Silicon Valley and Boston) and in early 2025 it signed an LOI to join the Illinois Quantum and Microelectronics Park, indicating its intent to build out a R&D presence near leading US quantum research hubs. Diraq also collaborates with U.S. government labs – for instance, it partnered with Fermilab on a quantum sensor project that won a U.S. DOE grant in 2025 – illustrating that it’s actively engaging in international research initiatives.

The company’s achievements have earned recognition in the quantum technology community. Besides the DARPA QBI contract mentioned earlier, Diraq has won awards such as the 2025 NSW iAward for Technology Platform Innovation, which acknowledged the startup’s pioneering approach to scalable silicon quantum chips. Diraq’s leadership (Prof. Dzurak and others) are frequently invited in panels and talks on quantum engineering, reflecting a growing reputation. Moreover, Diraq’s decision to remain independent of the more high-profile Silicon Quantum Computing (SQC) venture has effectively given Australia two parallel quantum hardware efforts – a fact noted by observers. While SQC pursues single-atom qubits, Diraq’s quantum dot approach has now firmly established its own identity and track record, making the Sydney ecosystem uniquely diversified in quantum modalities.

It should be noted that Diraq’s goals remain extremely ambitious, and some of the hardest deliverables are still ahead. As of 2025, Diraq has not yet demonstrated a multi-qubit array with full control (beyond two-qubit gates) nor a logical qubit, and the scalability of its techniques is unproven beyond the laboratory scale. This is not a criticism of Diraq per se – no one in the world has demonstrated a million-qubit processor or a true fault-tolerant logical qubit yet – but rather a reminder that a significant gap exists between the company’s stated long-term goals and its current experimental achievements.

Diraq’s public communications, however, have been relatively transparent about this timeline: they openly state the need for millions of qubits and do not claim to have solved scaling yet, only that they have a roadmap and a plausible path forward. To date, the company has executed well on intermediate milestones (fidelity, integration, etc.), lending credibility to its roadmap. The next milestones on the horizon – such as a 9-qubit prototype chip and a demonstration of a logical qubit – will be crucial tests of Diraq’s ability to move from isolated breakthroughs to complex integrated systems. Investors and partners will certainly watch whether Diraq can deliver a 5-10 qubit device with all-to-all control (or a small error-correcting code) in the coming couple of years. Any significant discrepancies or delays in hitting those technical targets could raise concerns, but conversely, success on those fronts would validate Diraq’s bold projections. So far, Diraq’s execution has largely matched its promises: it has achieved the performance metrics it set out to hit by this stage and has built a strong coalition (academia, government, industry) to support its mission. The company’s track record can thus be summarized as one of high-caliber research translated into engineering progress, tempered by the understanding that the ultimate scale-up challenge – going from a handful of qubits to a fault-tolerant quantum computer – is still to be conquered.

Challenges

Building a large-scale fault-tolerant quantum computer is widely regarded as a grand engineering challenge, and Diraq is no exception to facing major hurdles. Many of these challenges are explicitly acknowledged by the company and form the flipside of its optimistic roadmap. One major set of issues involves fabrication and hardware scale-up. Diraq must find a way to reliably manufacture chips with orders of magnitude more qubits than currently exist, while keeping each qubit within spec. Semiconductor fabrication at the 20 nm scale is extremely precise but not perfect; small variability in gate dimensions, oxide thickness, or dopant placement can change a qubit’s behavior. In a silicon spin qubit, such variations might mean some qubits have different resonance frequencies or coupling strengths, complicating control. Uniformity requirements for millions of qubits will be far tighter than for today’s few-qubit experiments. Even if the fabrication process can be refined (for example, using isotopically pure silicon wafers to eliminate nuclear spin noise, and employing state-of-the-art e-beam or EUV lithography for gate patterning), yield will be a concern – some fraction of qubits might simply not work as intended. Diraq is addressing this by partnering with leading chip manufacturers (GlobalFoundries and imec) to utilize advanced semiconductor processes and move “from lab to foundry”. These partners bring expertise in high-volume production and can help implement Diraq’s qubit designs on 300 mm wafers, which is promising. Still, transferring a delicate quantum device architecture to a commercial fab can be challenging (materials, process flows, and equipment need to be tuned for quantum performance, which is not a standard chip fab metric).

There is also the matter of packaging and cryogenics: A million-qubit chip will be perhaps on the order of centimeters in size and will need to be housed in a cryostat with wiring or integrated interposers connecting to control electronics. Ensuring robust thermal anchoring and minimizing thermal gradients across such a large chip at millikelvin temperatures is non-trivial. Diraq’s approach of monolithic integration (placing classical control in the same package as the qubits) helps reduce the number of I/O connections, but it introduces its own thermal load. The recent demonstration showed that at a small scale, a control chip could be placed ~1 mm away from the qubits without adverse effects. Scaling that up means possibly having many such control chiplets distributed across a large array, which will require clever chip architecture and interconnects.

Another critical challenge is scaling the control and readout system to match the qubit count. In a conventional experiment, each spin qubit might have several control lines (for example, a DC gate voltage, a microwave drive line, and a readout sensor line). Obviously, one cannot simply multiply that wiring by 1 million – the heat load and physical bulk would be prohibitive. Diraq and others will need to implement multiplexing and signal distribution at a massive scale. The cryo-CMOS approach is one solution: it can generate many control signals on-chip, reducing the number of wires to the room-temperature environment. However, designing cryogenic CMOS that can handle fast qubit gating signals, while itself not introducing too much noise or heat, is extremely challenging. The control electronics must also be ultra-low power (as demonstrated, on the order of nanowatts per channel) and radiation-hard (because even minor heating or cosmic ray events could disturb millions of qubits). Readout poses a similar problem: reading out spin qubits often relies on measuring tiny currents or transients in quantum dot sensors. Scaling that up might involve arrays of cryogenic amplifiers or RF reflectometry with frequency multiplexing. Technologies like high-electron-mobility transistor (HEMT) amplifiers at cryo temps or resonator networks for readout will have to be deployed. Diraq’s partnership with Riverlane hints that they will offload some of the complexity to classical co-processors – e.g. using FPGAs or custom ASICs to decode error syndromes in real time – but even those need to interface with the quantum chip in a fast and efficient manner. In essence, the classical “back-end” of a large quantum computer may be as complex as the quantum chip itself, and Diraq will need to orchestrate both. This is a recognized challenge industry-wide: DARPA’s QBI program, in which Diraq participates, explicitly stresses validating the full system concept including control and error correction overhead.

Qubit fidelity and error correction overhead constitute another intertwined challenge. While Diraq achieved >99% two-qubit fidelity on two-qubit devices, maintaining that fidelity across many qubits operating in parallel is more difficult. Imperfections that are negligible in a two-qubit test (e.g. crosstalk between neighboring qubits, or slow drift in gate voltages) can become serious in a larger array. Additionally, surface code error correction will require executing sequences of gates in a very synchronized manner (a cycle of error syndrome extraction every few microseconds, for instance). This demands not only high fidelities but also uniform timing and reliable gating on all qubits simultaneously. Any significant variability or “hot spots” in error rates could lower the effective threshold and force the use of more qubits for error correction. With ~1% error rates, a surface code might need ~1,000 physical qubits per logical qubit to reach useful logical error rates. If the error per gate is slightly higher (say 2% or 3%), the required overhead skyrockets, possibly to many thousands of physical qubits per logical. Thus, Diraq faces the task of squeezing another order of magnitude (or more) out of the error rates. They will likely need to get two-qubit errors well below 1% (into the 0.1% or 0.01% range) to make a million-qubit machine truly effective. This could involve implementing advanced error mitigation at the physical level – for example, dynamical decoupling to combat charge noise, or composite pulses to cancel control errors. It might also involve materials science work: improving the silicon/dielectric interfaces to reduce charge fluctuations, using new fabrication methods to limit defects, etc. Intel’s research on silicon spin qubits has noted, for instance, that variability and charge noise are big issues on larger arrays; Diraq will have to confront the same. Encouragingly, silicon qubits do not suffer from some noise sources that plague superconductors (like flux noise or critical current noise), but they have their own unique issues. Completely eliminating nuclear spins in the environment is costly (it requires isotopically enriched silicon and possibly isotopically pure ancilla materials like oxides), but it may be necessary for ultra-high fidelity.

Finally, there are execution and timeline risks. Diraq’s goal of a fault-tolerant prototype by 2033 is aggressive given that current devices have only a handful of qubits. It essentially implies a Moore’s-Law-like growth in qubit count (doubling many times over in a decade) and parallel progress in error reduction and integration. Hardware development is rarely so exponential – often it encounters plateaus where some bottleneck (e.g. a materials issue or a design limitation) takes years to overcome. If, for example, a certain yield problem limits chips to, say, 100 functional qubits by 2027, that would slow the roadmap unless a new breakthrough occurs. Competition is also a factor: while not a direct technical challenge, the presence of well-funded competitors (some with far larger budgets) means Diraq must progress swiftly to stay relevant. Tech giants and large startups are pursuing alternative routes to large quantum computers, and they might solve some scaling challenges first, attracting talent and funding away. However, it’s worth noting that Diraq’s approach is somewhat unique, and in a scenario where superconducting or ion-trap approaches hit a wall at intermediate scales, silicon spin qubits could become the next viable path – but only if Diraq (and the research community) overcome the challenges above. In terms of risk to timeline, a key near-term indicator will be whether Diraq can demonstrate a small error-corrected qubit (logical qubit) in the next few years. That will involve maybe ~20-50 physical qubits in a surface-code patch, running for long enough to show improved coherence. If that milestone slips significantly, it may signal that unforeseen obstacles (in calibration, cross-talk, etc.) arose when scaling from 2 to ~20 qubits. On the other hand, if Diraq does achieve a logical qubit with competitive performance, it would validate many of the assumptions in its plan and make the later steps (hundreds, then thousands of qubits) more a matter of engineering resources and integration, rather than scientific unknowns.

In summary, Diraq’s challenges can be encapsulated in a few broad categories: (1) Manufacturing scale and uniformity – making many qubits that all behave reliably, (2) Cryogenic integration of controls – managing control/readout for millions of signals at mK temperatures, (3) Further error reduction – pushing fidelities higher to curb the exponential resource costs of QEC, and (4) Execution speed and funding – hitting ambitious roadmap milestones in a timely fashion. Each of these is a formidable problem. The company’s current partnerships (with foundries, with cryogenic electronics experts, with QEC developers) suggest it is tackling these in parallel. The coming years will reveal how effectively these partnerships and plans translate into tangible prototypes. If Diraq can solve even most of these issues, it stands to revolutionize quantum computing; if not, these same issues could delay its lofty goals significantly. It is a high-risk, high-reward trajectory, characteristic of the leading edge of quantum technology development.